Intel Ships Stratix 10 DX FPGAs; VMware Among Early Partners
September 20, 2019 -- Intel today announced shipments of new Intel® Stratix® 10 DX field programmable gate arrays (FPGA). The new FPGAs are designed to support Intel® Ultra Path Interconnect (Intel® UPI), PCI-Express (PCIe) Gen4 x16, and a new controller for Intel® Optane™ memory to provide flexible, high performance acceleration. VMware is one of many early access program participants.
“Intel Stratix 10 DX FPGAs are the first FPGAs designed to combine key features that dramatically boost acceleration of workloads in the cloud and enterprise when used with Intel’s portfolio of data center solutions. No other FPGA currently offers this combination of features for server designs based on future select Intel® Xeon® Scalable processors.”
– David Moore, Intel vice president and general manager, FPGA and Power Products, Network and Custom Logic Group
What It Does: Stratix 10 DX FPGAs with the new interfaces include the option to support select Intel Optane DC persistent memory dual in-line memory modules (DIMMs)1. They dramatically increase bandwidth and provide coherent memory expansion and hardware acceleration for upcoming select Intel Xeon Scalable processors.
Why It’s Important: Data center customers increasingly use hardware accelerators, like FPGAs, when more computational speed is required from server systems running networking and cloud-based applications such as artificial intelligence training/inferencing or database-related workloads. The effective performance of hardware accelerators depends heavily on the communications bandwidth and latency between one or more server CPUs, available system memory and any attached accelerator (GPU, FPGA, application-specific standard products, etc.).
By diverting certain tasks to accelerators, more CPU cores become available to work on other higher priority workloads, increasing data center operator efficiency. Intel’s FPGA-based accelerators provide hardware-assisted performance combined with the flexibility to adapt to multiple workloads.
“VMware and Intel have a long history of developing and delivering innovative solutions to the industry. As part of this continued partnership, VMware is collaborating with Intel to develop coherent FPGA and CPU acceleration solutions. Our mutual customers demand high performing, easy to use, and reliable infrastructure, both on-premises and in the cloud. Intel is a great partner to us in helping deliver this,” said Krish Prasad, senior vice president and general manager, Cloud Platform Business Unit at VMware.
The Details: When compared with previous FPGA variants, Intel believes that Intel Stratix 10 DX FPGAs will provide new capabilities and interface features including:
- The UPI interface in combination with future select Intel Xeon Scalable Processors will deliver 37% lower latency2 and improve overall system performance via coherent data movement and a theoretical peak transfer rate of 28 GB/second.3 Memory coherent FPGA interfaces are a part of Intel’s roadmap as we move toward Compute Express Link availability in 2021.
- PCI-SIG compliant Gen4 x16 interface delivers a theoretical peak data bandwidth of 32 GB/second. Both data center and non-data center applications will realize about two times more throughput.4
- Memory controller supports up to eight Intel Optane DC persistent memory DIMMs per FPGA (up to 4 TB of non-volatile memory).
- Other existing Stratix 10 FPGA features include 100 GB/second Ethernet, HBM2 memory stacks and a quad-core ARM Cortex-A53 processor subsystem with peripherals.
More Context: Intel Stratix 10 FPGA Website
The Small Print: Results have been estimated or simulated using internal Intel analysis, architecture simulation and modeling, and provided to you for informational purposes. Any differences in your system hardware, software or configuration may affect your actual performance. For more complete information, visit www.intel.com/benchmarks. Intel does not control or audit third-party benchmark data or the websites referenced in this document. You should visit the referenced website and confirm whether referenced data are accurate.
1 UPI R&D now, PCIe Gen4 for general use as well as aligned to a future Intel Xeon Scalable Processor.
2 Based on internal Intel estimates for worst case roundtrip latency between the Intel Stratix 10 DX device and future select Intel Xeon Scalable Processor (UPI vs. PCIe read transaction).
3 Based on internal Intel estimates per UPI specification at 11.2 GT/s.
4 PCI-SIG peak theoretical performance PCIe Gen3. vs. PCIe Gen4.
|
Related News
- S2C Announces 300 Million Gate Prototyping System with Intel Stratix 10 GX 10M FPGAs
- S2C Delivers New Prodigy FPGA Prototyping Solutions with the Industry's Highest Capacity FPGA from Intel
- Intel Ships First 10nm Agilex FPGAs
- Exostiv Labs now supports Intel Stratix 10 FPGA
- Intel Chip Performs 10 Trillion Calculations per Second
Breaking News
- Silicon Creations Celebrates Milestone with Delivery of 1,000th Production License for Fractional-N PLL
- Kudelski IoT Launches Quantum-Resistant Security IP, Future-Proofing Semiconductors Against Emerging Quantum Threats
- Arteris and MIPS Partner on High-Performance RISC-V SoCs for Automotive, Datacenter and Edge AI
- NanoXplore acquires Dolphin Design's ASIC business and strengthens its strategic position in aerospace
- intoPIX and Media Links: Powering Next-Generation IP Media Transport with JPEG XS at InterBEE 2024
Most Popular
- Flex Logix Acquired By Analog Devices
- MIPS Releases P8700, Industry's First High-Performance AI-Enabled RISC-V Automotive CPU for ADAS and Autonomous Vehicles
- Tessolve to Acquire Germany's Dream Chip Technologies
- Oriole Networks Selects EnSilica as ASIC Partner and Contract Award for Photonics Controller ASIC
- Imagination DXS GPU officially certified as ASIL-B compliant
E-mail This Article | Printer-Friendly Page |