Achronix, Cisco, Facebook, Netronome, NXP and zGlue Collaborate on Proof-of-Concept for Chiplet Solutions as Part of OCP ODSA Subproject

Amsterdam, The Neterlands -- Oct. 08, 2019 -- Achronix, Cisco, Facebook, Netronome, NXP and zGlue shared details on the progress of their collaboration to validate technology and business opportunities for chiplet solutions. Their work is part of the Open Compute Project (OCP) Open Domain-Specific Architecture (ODSA) subproject focused on the development of chiplet-based architecture. The companies, all members of the ODSA Proof of Concept (PoC) group, are tasked with validating the technology proposals from the program, as well as working to understand and test business and technical issues around having multiple companies collaborating and sharing responsibility on a chiplet solution.

As a first step, the group is working to deliver a software development prototype by the end of the year involving multiple small interoperable, interchangeable boards, which would model a single-chip solution based on chiplets.

“As companies look to develop optimized products for accelerating markets such as artificial intelligence, HPC and 5G, they need the opportunity to differentiate their solutions,” said Quinn Jacobson, strategic architect at Achronix. “Achronix believes that chiplet solutions offer greater flexibility to companies creating next-generation products. Creating a chiplet solution allows smaller semiconductor companies to share their expertise as part of an end-to-end solution without having to create entire solutions themselves.”

The ODSA subproject’s mission is to define an open interface and architecture that enables the mixing and matching of silicon chiplets from different vendors via an open marketplace onto a single SoC. Since being chartered within OCP in March 2019, the ODSA has made critical steps in defining and developing a chiplet-based architecture with the introduction of new interfaces, link layers, a marketplace and exchange, and an early proof-of-concept. In addition to the PoC group, other subgroups include the PHY interface group and the Business Working group.

Decades of progress with general-purpose CPUs has slowed while performance requirements of workloads have catapulted, driving significant demand in domain-specific accelerators. Chiplet-based designs that combine multiple die into a single package can reduce the development time and manufacturing costs for accelerators. According to a preliminary research report by IHS/Informa, the aggregate market for chiplets is projected to be almost $3B by 2024 and grow to $10B in 2030.

For additional information and how to get involved, please visit the project portal and join the mailing list.