English
Arm Responds to RISC-V, and More
By Kevin Krewell, EETimes
October 11, 2019
SAN JOSE, Calif. — The big news at Arm Techcon this year is that Arm is opening up its instruction set to customers’ customized instructions for Cortex M cores.
Arm CEO Simon Segars announced the changes in his opening keynote at Arm TechCon. After decades of tight control over the Arm instruction set architecture (ISA), Arm has finally decided that it can allow its licensees to build their own custom instructions, which are often useful to accelerate specialized workloads.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
Related News
- Arm China's ex-CEO sets up RISC-V company
- Controversial former Arm China CEO founds RISC-V chip startup
- Digital Blocks AMBA Multi-Channel DMA Controller IP Core Family Extends Leadership with releases for core DMA Engines in RISC-V® & ARM® Systems and Peripherals to Memory Applications
- Nordic combines Arm and RISC-V for "remarkable" EEMBC benchmarks
- LC3plus audio codec optimized for ARM®, RISC-V, HI-FI & Kalimba™ DSPs for Bluetooth® LE Audio are available for Immediate Licensing
Breaking News
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards