IntelliProp to Demo World's First UPI to Gen-Z Load/Store Host Adapter at SC19
Expanding x86 CPU DRAM Memory over the Gen-Z Fabric
Longmont, Colo — November 18, 2019 – IntelliProp, Inc., a leader in innovative Intellectual Property (IP) Cores and semiconductors for Memory and Data Storage applications, announced today that they will be demonstrating the World’s first Load/Store Host Adapter between Intel® Xeon® CPUs and Gen-Z Memory Modules (ZMM), utilizing Intel’s low latency Ultra Path Interconnect (UPI) and IntelliProp’s Gen-Z IP at SC19. SC19, The International Conference for High Performance Computing, Networking, Storage and Analysis is being held at the Colorado Convention Center in Denver, CO, November 18-21, 2019. IntelliProp is exhibiting in booth #893, which is located directly across from the Gen-Z Consortium booth at #789. IntelliProp is the industry leader in the development of Gen-Z Design IP and is developing the Gen-Z solutions that are enabling the Gen-Z Consortium demonstrations.
In the Gen-Z Consortium booth, #789, an IntelliProp developed UPI-to-Gen-Z Host Adaptor Proof of Concept demonstration will show the next step in latency reduction with true load store capability. The demo will showcase unmodified database applications (SQLite and MongoDB) running out of Gen-Z memory compared to a traditional SSD. This new architectural approach allows for the elimination of the software stack latency associated with the database filesystem, resulting in significant improvements to database operations per second. This proof of concept was created using IntelliProp’s Gen-Z IP that is compliant with the Gen-Z Core Specification Rev 1.1, IntelliProp’s low latency, high throughput bridging technology as well as the IntelliProp Gen-Z DRAM Memory Controller ASSP codenamed “Mamba”. The IntelliProp IPA-GZ194A-CT “Mamba” Fabric Memory Controller will be shown in a Gen-Z Memory Module utilizing the EDSFF E3 (SFF-TA-1008) form factor. The “Mamba” Fabric Memory Controller will be writing/reading data over a switched Gen-Z fabric that originates on a Proof of Concept server using an Intel® Xeon® CPU bridged via the UPI bus to Gen-Z via the IntelliProp UPI-to-Gen-Z Bridging FPGA reference design. This will demonstrate a key feature of Gen-Z allowing true memory expansion and pooling through the disaggregation of DRAM memory and to share this memory space with multiple servers communicating over the Gen-Z Fabric. This PoC demo is an initial step toward productized solutions which will support industry development.
About IntelliProp
IntelliProp, Inc. develops ASSP Products, licensable IP cores and highly integrated IP Products for Memory and Data Storage applications. Areas of significant expertise include SATA, SAS, PCIe/NVMe, Gen-Z, NVDIMM and RAID technologies. Headquarters, sales office, and design center are located in Longmont, CO. Please visit our website: https://www.intelliprop.com or contact IntelliProp at (303) 774-0535.
|
IntelliProp, Inc.. Hot IP
Related News
- IntelliProp to Demo PCIe to Gen-Z Bridge at SC18
- IntelliProp to Demo Gen-Z 1.0 Compliant IP at Flash Memory Summit 2018
- IntelliProp Announces Q1 2018 Release of Gen-Z IP Cores Supporting Rev 1.0 Specification
- IntelliProp Announces Gen-Z Persistent Memory Controller Combining DRAM and NAND
- Gennum's Snowbush PCI Express (PCIe) Switch and SATA/PCIe Host Bus Adapter IP Added to PCI-SIG Integrators List
Breaking News
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- BrainChip Gives the Edge to Search and Rescue Operations
- ASML targeted in latest round of US tariffs
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- Creonic Unveils Bold Rebrand to Drive Innovation in Communication Technologies
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- AMD Achieves First TSMC N2 Product Silicon Milestone
- Why Do Hyperscalers Design Their Own CPUs?
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |