Improv's Jazz DSP Most Efficient Processor in both Optimized and Out-of-the-Box EEMBC Benchmarks
Optimized Configuration Performed 6X Better Than Nearest Competitor
Beverly, Mass - January 27, 2003 - Improv Systems™, a pioneer in application-optimized DSPs, today announced it completed the Embedded Microprocessor Benchmark Consortium (EEMBC) Telecom benchmark certification process for its Jazz™ Telecom XT Processor and achieved the highest speed rating per cycle of any intellectual property processor ever certified in both the Optimized and Out Of The Box benchmarks. Measured by performance per clock cycle, the Jazz processor is 12X more efficient than the TI C62 and 6X more efficient than the Tensilica Xtensa T1050. "Our results in the EEMBC Telecom benchmark for optimized processors confirms that we have the best architecture for the specialized requirements of today's compute-intensive embedded consumer and telecom applications," said Cary Ussery, president and CEO of Improv Systems. "The fact that our Jazz Telecom XT, providing an 85X performance increase from the Jazz 2020, could be built in just a few weeks using our basic tool suite, shows that we made the right investment to create a complete development environment and a true data flow architecture."
The EEMBC Telecom benchmark suite is recognized by the industry as a significant barometer of real world performance because it is based on real application kernels and is developed with the input of its membership, which ensures the tests are fair and relevant. EEMBC's members include more than 55 of the world's leading semiconductor, intellectual property and compiler companies. In addition, the independent EEMBC Certification Labs (ECL) monitors the benchmark process to certify that the consortium rules are strictly followed and that the results are repeatable and verifiable.
"The EEMBC Certification Laboratories has certified Improv's Jazz Telecom XT using their cycle-accurate simulator," said ECL Chairman and CTO Alan R. Weiss. "The optimized scores were even more impressive than the previously certified out of the box scores: per megahertz (MHz), the Jazz processor beat everyone else who has been benchmarked and certified (simulator or hardware) to date for the EEMBC optimized Telecom suite. This performance is even more remarkable because no assembly code was used, underscoring how well the Improv Jazz design environment and configurable architecture work together." Data on the Jazz Telecom XT, as well as other processors is publicly available on the EEMBC Web site, http://www.eembc.org; the industry's most comprehensive independent source of comparative performance data for embedded processors.
The EEMBC Telecom benchmark measures the speed at which processors handle a variety of tasks. To test different aspects of the processor and the tool chain, EEMBC requires three to four sets of data to be presented for each benchmark: 'Out-of-the-Box', meaning tests are run in high-level language with no code modifications; and 'Full Fury', where full optimization is allowed to speed things up. While 'Full Fury' allows the use of assembly code, the Jazz Telecom XT did not use this option since the advanced Jazz PSA "C" Compiler makes this unnecessary. Speed-ups of 20-50 times are considered excellent. The Jazz Telecom XT achieved a speed-up of over 85 times compared to its generic brother the Jazz 2020; this is particularly noteworthy since the 2020 is the most efficient 'Out-of-the-Box' processor tested.
The Jazz Telecom XT processor makes full use of Improv Systems' patented technology for mapping high-level language programs directly into application specific integrated circuits. The processor's VLIW architecture provides exceptional parallelism and a rich combination of Generic and Designer Defined Computation Units (DDCU's) to efficiently execute the Telecom applications code in the EEMBC benchmarks. A total of fourteen slots are available in the processor for the simultaneous execution of computation and memory operations. Strategically placed, shared memories ensure that processing is never stalled waiting for data. The complex tasks of code generation, data allocation, and process scheduling, are all handled automatically by the advanced Jazz PSA Compiler, which is tightly coupled with the architecture and the Telecom XT configuration, to produce optimal execution streams. To produce comparable execution speeds, one processor resorts to 2GHz operating speed resulting in 15 W power draw compared to 0.1 W used by the Jazz Telecom XT.
"By providing hard, unbiased data on a wide cross-section of processors and how they perform in embedded applications, EEMBC plays an important role in the electronics industry. I'm proud of the work we've done to help end-users in the difficult process of selecting the best fit for their applications," said Markus Levy, EEMBC President. "Improv's performance in the optimized Telecom benchmark suite is a good example of the value of these types of evaluations. By achieving and demonstrating this level of efficiency, Improv changes the equation for choosing a DSP by providing hard-wired performance levels with the flexibility of a programmable processor."
All applications for the Jazz processors are written in a high-level language. Targeting to specific configurations, including multi-processor systems, is handled by the Jazz PSA™ Compiler (although a single processor was used in this benchmark case). This compiler, which takes "C" or Java as input, has the unique ability to allocate tasks and memory for maximum parallelism. All inter-processor communication is scheduled without the need for assembly code. Improv ran the EEMBC Telecom benchmark completely in a high-level language with no added or substituted assembly code or intrinsics.
Complete benchmark data on all EEMBC certified processors is available on the EEMBC Web site, www.eembc.org. Specific information about the Improv products is posted on the company's Web site, www.improvsys.com/eembcbenchmark.cfm. Benchmarking fairness is provided through the ECL (http://www.ebenchmarks.com).
About EEMBC
EEMBC, the Embedded Microprocessor Benchmark Consortium, develops and certifies real-world benchmarks and benchmark scores to help designers select the right embedded processors for their systems. Every processor submitted for EEMBC® benchmarking is tested for parameters representing different workloads and capabilities in communications, networking, consumer, office automation, automotive/industrial, embedded Java, and microcontroller-related applications. With members including leading semiconductor, intellectual property, and compiler companies, EEMBC establishes benchmark standards and provides certified benchmarking results through the EEMBC Certification Labs (ECL) in Texas and California. About Improv Systems, Inc.
Improv Systems, Inc. develops and licenses the Jazz PSA™ platforms featuring the Jazz DSP and application solution kits for Voice-over-IP, Networking and Emerging Media. Improv's Jazz DSP is a configurable DSP that allows designers to create optimized DSP cores targeted to consumer electronics and telecommunications markets. Through the company's Ensemble™ Partners program, formed to help accelerate the use and integration of designer-defined DSPs in System-on-Chip (SoC) solutions, Improv customers have access to complementary products and services from companies such as ARM (ARMHY), MIPS Technologies (MIPS, MIPSB), Synopsys (SNPS), Cadence Design Systems (CDN); and Wind River Systems (WIND) among others.
Improv, Jazz DSP, Jazz PSA , Jazz PSA Composer, Jazz PSA Rehearsal, Acappella and Crescendo are registered trademarks or trademarks of Improv Systems, Inc. in the United States and/or other countries. Product and company names mentioned herein are trademarks and/or registered trademarks of their respective companies.
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