MIPI CSI DSI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
New Highly Optimised LDPC Decoder in Software for Intel's FlexRAN Reference Software Will Increase Throughput by up to 3X
Channel Coding Software Increases Network Power Efficiency and Reduces Latency
Southampton, UK – March 18, 2020 – AccelerComm, the company supercharging 5G with Optimisation and Latency Reduction IP, today announced they have developed a highly optimised LDPC software decoder in collaboration with Intel. The solution is integrated into the Intel’s FlexRAN Reference Software resulting in increased throughput by up to 3 times over alternate implementations. The LDPC decoder benefits from a combination of optimised architectural and algorithmic enhancements and use of the powerful Intel Architecture and Intel Advanced Vector Instructions 512 (Intel AVX512) instruction sets. The AccelerComm LDPC implementation takes advantage of these capabilities on Intel Xeon Scalable processor and with fewer cores delivers performance within 0.1 dB of Intel’s SDK module. FlexRAN is a reference architecture developed by Intel to implement virtualised Radio Access Networks which can be deployed on any part of the wireless infrastructure from edge to core. The LDPC software decoder can operate as an upgrade to FlexRAN or standalone and is available directly from AccelerComm.
Ad |
DVB-S2X LDPC/BCH Decoder ![]() LDPC Encoder/Decoder (LDPC) ![]() China Multimedia Mobile Broadcasting (CMMB) LDPC decoder ![]() |
Channel coding, also known as forward error correction, is used to correct transmission errors in mobile communications caused by noise, interference and poor signal strength. While 3G and 4G used Convolutional and Turbo codes for the control and data channels, 5G uses the much more sophisticated Polar and LDPC codes and requires the industry to look afresh at how to address error correction. If channel coding is not working well the impact on mobile networks is poor capacity, poor data rates, poor coverage and poor quality of service. AccelerComm’s LDPC IP brings many years of experience in forward error correction to address this challenge in the 5G networks now being launched.
“5G promises a revolution in the way that mobile networks are deployed and their performance,” said Tom Cronk, CEO of AccelerComm. “To deliver on these expectations the industry has to increase efficiency at every level in order to deliver the best possible potential consumer experience and maximum business potential. This combination of AccelerComm’s pioneering Channel Coding IP and Intel technology delivers significant performance and flexibility gains.”
“Intel’s FlexRAN reference software helps accelerate RAN development for a range of 4G and 5G use cases,” said Cristina Rodriguez, VP and GM of Intel’s Wireless Access Network Division. “Companies like AccelerComm who are using this software-based RAN architecture are creating new paths to quickly commercializing solutions for various types of RAN deployments.”
Download an evaluation version of an optimised LDPC decoder for FlexRAN, available now:
AccelerComm offers a range of LDPC and Polar IP optimised software decoders for Intel architecture and Intel AVX-512. About AccelerComm AccelerComm is the company supercharging 5G with Optimisation and Latency Reduction IP. It provides LDPC, polar and turbo FEC solutions which enable optimal performance of communication systems and solves the challenges that would otherwise limit the speed of 5G, namely the error correction decoding that is required to overcome the effects of noise, interference and poor signal strength. For more information please visit: www.accelercomm.com
|
AccelerComm Limited Hot IP
Related News
- Siemens collaborates with Intel Foundry to contribute 3D-IC technology leadership for Intel's EMIB reference flow
- Synopsys' New ProtoCompiler Software Speeds Time to First Prototype by Up to 3X
- Hantro delivers optimised software codecs for Intel's next generation processors
- INTERCHIP achieves 3x faster verification for next-gen clocking oscillator with Siemens' advanced analog and mixed-signal EDA technology
- Siemens' Calibre platform now certified for IFS' Intel 16 process technology
Breaking News
- Q2 2024 Global Semiconductor Equipment Billings Increased 4% Year-Over-Year, SEMI Reports
- CAST Ships I2C/SPI Controller IP Core for Easier Serial Communication
- GUC Monthly Sales Report - August 2024
- UMC Reports Sales for August 2024
- CoreHW and Presto Engineering Announce Ground-breaking Collaboration to Advance Global Penetration of Ultra-low-power RF IoT Devices
Most Popular
- Blue Cheetah Collaborates with LG to Demonstrate Successful Silicon Bring-Up of Chiplet-Based Design
- SiliconAuto adopts Siemens' PAVE360 to accelerate pre-silicon ADAS SoC development
- Intel considers foundry split, fab cancellations
- CoreHW and Presto Engineering Announce Ground-breaking Collaboration to Advance Global Penetration of Ultra-low-power RF IoT Devices
- Global Semiconductor Sales Increase 18.7% Year-to-Year in July
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |