Mentor's High Density Advanced Packaging solution certified for Samsung Foundry's most advanced packaging process
October 29, 2020 -- Mentor, a Siemens business, today announced that Samsung Foundry has certified Mentor’s digitally integrated High Density Advanced Packaging (HDAP) flow for Samsung’s MDI™ (Multi-Die-Integration) packaging process. Mentor, together with the Siemens Simcenter software team, developed a prototyping, implementation, verification and analysis reference flow in close collaboration with Samsung Foundry to provide mutual customers with a comprehensive solution for the fabrication of highly sophisticated multi-die packages.
Worldwide fabless semiconductor and systems companies increasingly utilize multi-die architectures for new ICs targeting a range of fast-evolving applications, including the high-performance computing (HPC), 5G wireless mobile, Industrial Internet of Things (IIoT) and autonomous vehicles markets. Deployed side-by-side or stacked in a 3D configuration, multi-die designs are often integrated into a single system-in-package (SiP), which can help to meet stringent market requirements for smaller form factors, power-efficiency, low latency and high performance. In addition, SiP technology allows for each individual die to be implemented in its optimal process node.
Enabling the rapid prototyping, planning, designing and verifying of highly advanced multi-die packages, Mentor’s HDAP solution is now optimized for Samsung’s MDI technology. For customers, this optimization helps enable seamless integration across multiple dies through construction of the complete MDI package assembly, which is the use model that Siemens’ digital twin strategy envisions. This MDI digital twin drives a range of Mentor HDAP solution technologies including Xpedition™ Substrate Integrator software, Xpedition™ Package Designer software, HyperLynx™ SI software, HyperLynx™ DRC software and Calibre® 3DSTACK software, as well as Siemens’ Simcenter™ Flotherm™ software.
“This certification helps our mutual customers more fully leverage the many advantages of Samsung’s new MDI flow when deploying designs utilizing Mentor’s advanced IC packaging solutions. For example, customers can potentially integrate multiple application-specific die and/or chiplets into a single packaged device that is specifically optimized for their target application,” said Sangyun Kim, vice president of Foundry Design Technology Team at Samsung Electronics. “Such collaboration between Mentor, Siemens and Samsung is intended to provide customers with reductions in cost and turnaround time, together with potential increases in quality and reliability through the digital twin driven design process.”
The combined technologies from Mentor and Siemens have established a solution featuring digital, prototype-driven planning, co-design, implementation, analysis, and comprehensive physical verification capabilities. And, because it is optimized for Samsung Foundry’s MDI packaging technology, customers can deliver new products to market on time and with greater performance and quality.
“This new solution again demonstrates the value of the close partnership between Samsung Foundry, Mentor and Siemens, which drives the creation of highly differentiated technologies that help our mutual customers compete and win in high-growth markets,” said AJ Incorvaia, senior vice president of the Electronic Board Systems Division at Mentor. “This digitally integrated, comprehensive flow helps enable customers to design multi-die packages that can achieve both engineering and business goals for their target applications.”
About Mentor Graphics
Mentor Graphics Corporation, a Siemens business, is a world leader in electronic hardware and software design solutions, providing products, consulting services, and award-winning support for the world’s most successful electronic, semiconductor, and systems companies. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. Web site: http://www.mentor.com.
|
Related News
- Cadence 3D-IC Advanced Packaging Integration Flow Certified by Samsung Foundry for its 7LPP Process Technology
- Cadence Digital and Custom/Analog Design Flows Certified for Samsung Foundry's SF2 and SF3 Process Technologies
- Cadence Custom/AMS Flow Certified for the Samsung Foundry 3nm Advanced Process Technology for Early Design Starts
- Mentor extends industry-leading EDA software support for Samsung Foundry's 5/4nm process technologies
- Multiple Mentor product lines now certified on TSMC's most advanced processes
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |