PLDA Announces CXL 2.0 Support in their XpressLINK Family of CXL Controller IP
PLDA XpressLINK and XpressLINK-SOC Controller IP for CXL 2.0 are available now and already being designed in at leading technology companies
SAN JOSE, Calif. November 10, 2020 -- PLDA, the industry leader in high-speed Interconnect solutions, today announced CXL 2.0 support for its XpressLINK™ and XpressLINK-SOC™ CXL IP solutions. Compute Express Link™ (CXL) is an open industry interconnect standard that builds on PCI Express® 5.0 infrastructure to enable memory coherency and low latency between processors and accelerators. The CXL 2.0 specification introduces additional functionality including first level switching, memory pooling and sharing, and Hot Plug, which aim to deliver important benefits for hyperconverged datacenter and HPC applications.
PLDA’s long track record of PCIe® innovation and success has given them an edge in CXL development, and their XpressLINK CXL IP is available now for integration into cutting-edge designs. Key features of PLDA XpressLINK CXL IP include:
- Support of the CXL 2.0 specification
- Full optimization for latency on CXL.mem and CXL.cache sub-protocols
- Complete support for Hot Plug
- Support for advanced Reliability, Availability, and Serviceability (RAS) features for CXL.io and for CXL.mem and CXL.cache
- Enablement and support for switching topology, memory pooling and sharing
According to Stephane Hauradou, CTO of PLDA “PCI Express is the go-to solution for connecting host processors and accelerator devices and PLDA has a long track record of providing best-in-class IP for the PCIe protocol. Our XpressLINK family of CXL IP builds on our PCI Express success, enabling a faster time-to-design for our valued customers who are building advanced CXL-based HPC and datacenter solutions.”
According to Barry McAuliffe, president of the CXL Consortium, "Compute Express Link is a key enabler for next-generation heterogeneous computing architectures, where CPUs and accelerators work together to deliver the most advanced solutions. With support from IP providers like PLDA, we're well on the way to a robust, innovative CXL ecosystem that will benefit the whole industry."
More Information
PLDA XpressLINK CXL IP solutions are available with either a Configurable AMBA® AXI and CXS Interconnect, or with an Intel-defined CXL-Cache/Mem Protocol Interface (CPI) . For more information on PLDA solutions, please visit the PLDA website:
• XpressLINK-SOC CXL Controller with Configurable AMBA AXI Interconnect Fabric: https://www.plda.com/products/xpresslink-soc-controller-ip-cxl
• XpressLINK CXL Controller with native interconnect: https://www.plda.com/products/xpresslink-controller-ip-cxl
About PLDA
PLDA is a developer and licensor of Semiconductor Intellectual Property (SIP) specializing in high-speed interconnect supporting multi-gigabit rates (2.5G, 5G, 8G, 16G, 25G, 32G, 56G, 112G), and protocols such as PCI Express, CCIX, CXL, and Gen-Z. PLDA has established itself as a leader in that space with over 3,300 customers and 6,400 licenses in 62 countries. PLDA is a global technology company with offices in Silicon Valley, France, Bulgaria, Taiwan, and China.
|
Related News
- PLDA Announces a Unique CXL Verification IP Ecosystem, Delivering Robust Verification That Reduces Time-to-Design for CXL 2.0 Applications
- PLDA Announces XpressLINK-SOC CXL Controller IP with Support for the AMBA CXS Issue B Protocol
- PLDA Announces Integration of its PCIe 2.0 controller with advanced AMBA AXI interface in Microsemi's new SmartFusion2 SoC FPGA
- SMSC Introduces Industry's Most Complete Digital Wireless Audio Processor With Tri-Band Support and Embedded Multi-Channel USB 2.0 Audio Controller
- Evatronix upgrades its SDIO Host Controller with the full support for CPRM, MMC 4.2, and SDIO specification rev. 2.0.
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |