PLDA Announces the Successful CXL Interoperability with pre-production Intel Xeon CPU, Code Named Sapphire Rapids
PLDA XpressLINK™ CXL Controller IP combines the industry’s lowest latency implementation with an easy-to-integrate design, accelerating adoption of CXL in SoC designs.
December 1, 2020 -- PLDA, the industry leader in high-speed interconnect solutions, today announced the successful CXL™ interoperability with pre-production Intel Xeon processors code named Sapphire Rapids. The session was conducted at Intel’s Industry Enabling Labs as part of a long-term collaboration between PLDA and Intel’s industry enabling group. It resulted in demonstrated interoperability between PLDA’s XpressLINK™ CXL IP, running on a PLDA FPGA-based add-in card, and Intel’s development platform equipped with pre-production “Sapphire Rapids” processors.
PLDA XpressLINK controller implements the CXL.io, CXL.cache, and CXL.mem sub-protocols as specified in the recently released CXL 2.0 Specification, and is already being designed-in at leading technology companies.
According to Stephane Hauradou, CTO at PLDA “Today’s demonstration of interoperability between PLDA’s XpressLINK CXL IP, which delivers the lowest latency in the industry, and a cutting edge CPU like pre-production Intel Sapphire Rapids processor, is a critical step in assuring SoC designers of the robustness of our CXL implementation”.
“CXL will be a foundational interconnect technology in the data centers and networks of the future,” said Dr. Debendra Das Sharma, Intel Fellow and Director of I/O Technology and Standards Group, Data Center Group. “The availability of third party silicon IP like the PLDA XpressLINK CXL Controller IP lowers integration risks and helps ensure quicker proliferation of the CXL protocol across the industry ecosystem.”
PLDA XpressLINK and XpressLINK-SOC CXL IP are highly parameterized Compute Express Link (CXL) controller Soft IP designed to the latest CXL Specification and architected for SoC, ASIC, and FPGA implementation. XpressLINK and XpressLINK-SOC are available for licensing immediately and are already designed in at several leading-edge technology companies. Readers interested in learning more about PLDA CXL interconnect solutions can visit PLDA website:
- XpressLINK-SOC CXL Controller with Configurable AMBA AXI Interconnect: https://www.plda.com/products/xpresslink-soc-controller-ip-cxl
- XpressLINK CXL Controller with CPI interconnect: https://www.plda.com/products/xpresslink-controller-ip-cxl
About the Compute Express Link (CXL) protocol
Compute Express Link™ (CXL) is a high-speed CPU interconnect designed to solve the challenge of improving performance and removing bottlenecks between CPUs and other important computing system components like GPUs, memory, and FPGAs. For more information about the CXL technology, visit the CXL Consortium website at https://www.computeexpresslink.org/.
|
Related News
- Mobiveil Announces Compute Express Link (CXL) 2.0 Design IP, Successful Completion of CXL 1.1 Validation with Intel's CXL Host Platform
- Synopsys Demonstrates Industry's First PCI Express 5.0 IP Interoperability with Intel's Future Xeon Scalable Processor
- Intel and AWS Expand Strategic Collaboration, Helping Advance U.S.-Based Chip Manufacturing
- Senior Intel CPU architects splinter to develop RISC-V processors - veterans establish AheadComputing
- Synopsys Demonstrates Industry's First Interoperability of PCI Express 6.0 IP with Intel's PCIe 6.0 Test Chip
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |