Silvaco and OPENEDGES Announce Availability of Integrated DDR Controller and PHY IP Solutions
SANTA CLARA Calif. and SEOUL, South Korea, Dec. 9, 2020 – Silvaco Inc., a leading supplier of EDA software and design IP, today announced a collaboration with OPENEDGES Technology, Inc., a leading provider of memory subsystem IP, to prove the integration of the OPENEDGES DDR memory controller with Silvaco DDR PHYs. The companies have validated the frictionless interoperability between the OPENEDGES DDR3/4/LPDDR3/4/5/GDDR6 memory controller and the Silvaco LPDDR4/4X PHY for Samsung Foundry. A joint webinar by OPENEDGES, Samsung Foundry, and Silvaco on the IP solution was recorded on October 13. To learn more details and view the webinar, go to Choosing the Right DDR Memory Subsystem for Your Next SoC!.
Silvaco is a world-class provider of design IP products and solutions: embedded processors and memories, wired and high-speed interfaces, bus fabrics, peripheral controllers, and advanced security cores for automotive, consumer, and IoT/sensor applications.
Related |
GDDR6 Memory Controller IP |
“OPENEDGES and Silvaco have evaluated each other’s DDR memory controller and DDR PHY and have demonstrated the easy integration between both IPs. The combined DDR IP solution will be a very good choice for design teams looking for maximum DRAM bandwidth in low power SoCs,” said Jeff Elias, VP and GM of Silvaco’s IP Division.
“OPENEDGES DDR3/4/LPDDR3/4/5/GDDR6 memory controller together with our NoC bus interconnect IP act as a complete memory subsystem. We have a singular focus on becoming a total memory subsystem IP vendor. We are excited to provide total memory subsystem IP solutions together with Silvaco DDR PHYs for Samsung Foundry. This partnership will provide great value for our customers’ SoCs,” said CEO of OPENEDGES, Sean Lee.
Silvaco’s DDR PHY and OPENEDGES’s DDR controller and NoC combined solutions are fully compliant to the JEDEC standard.
About OPENEDGES
OPENEDGES is a semiconductor IP provider for smart computing, empowering the Internet of Smart Things. OPENEDGES is committed to democratizing artificial intelligence technology at edge devices. OPENEDGES delivers IPs in two key technology areas of smart computing; highly efficient Artificial Intelligence Acceleration and high-performance Memory Subsystem(s). Aided by the synergy of these two technologies, OPENEDGES offers a sorely needed boost in performance, efficiency, and reliability for the Internet of Smart Things. ORBITTM DDR memory controller IP currently supports DDR3, DDR4, LPDDR3, LPDDR4, LPDDR4x,LPDDR5 and GDDR6. Support for DDR5, and HBM2 will be available soon. More information about OPENEDGES can be found at www.openedges.com.
About Silvaco, Inc.
Silvaco is a leading EDA tools and semiconductor IP provider used for process and device development for advanced semiconductors, power IC, display, memory, and SoC design. For over 35 years, Silvaco has enabled its customers to develop next generation semiconductor products in the shortest time with reduced cost. The company is headquartered in Santa Clara, California and has a global presence with offices located in North America, Europe, Japan, China, Taiwan, Korea, and Singapore.
|
Related News
- OPENEDGES and INNOSILICON unveil advanced DDR Controller and DDR PHY integrated IP solutions
- OPENEDGES Technology Achieves ISO 26262 ASIL-B Certification
- Denali Software DDR SDRAM Controller IP and PHY Solution Integrated into STMicroelectronics' SPEAr Family of Microprocessors
- OPENEDGES Completes the Tapeout of the 7nm HBM3 Memory Subsystem (PHY & Memory Controller) Test chip
- DDR Combo PHY & Controller IP Core Silicon Proven in 12nm & 28nm available for immediate licensing
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |