Andes Technology Provides RISC-V CPU Core to SK Telecom

HSINCHU, TAIWAN – January 7, 2021 – Andes Technology Corp. today announced that its 64-bit AndesCore™ AX25 RISC-V processor has been adopted by SK Telecom (hereinafter referred to as “SKT”), Korea’s leading ICT company, for the development of artificial intelligence products. Andes Technology is a leading supplier of RISC-V CPU cores. Its IP cores now are embedded in excess of 5-Billion SoCs covering a wide range of applications.

“We expect Andes Technology’s 64-bit AX25 based on RISC-V, armed with its high performance efficiency and rich configurations, to serve as the ideal controller solution for diverse NN applications on our high-performance AI chips,” said Chung Moo-kyoung, Project Leader of AI Accelerator at SKT. “We will continue to focus on innovating user experiences by realizing advanced AI technologies and solutions.”

“We are excited to collaborate with SKT by providing our processor AX25 to be a key component of SKT’s deep learning SoCs,” said Andes President Frankwell Lin. “The growing intelligent devices call for SoCs with ever more complex computing capabilities. To meet the increasing demands from customers, all Andes V5 processors support RISC-V ratified spec and thus fully benefit from expanding RISC-V ecosystem; in addition, they come with extensive configurable features for embedded applications and user-friendly software development environment.” For example, Andes supports vector interrupt and unaligned access for better performance efficiency and novel features such as PowerBrake, QuickNap™ for additional power saving; StackSafe™ for stack overflow/underflow protection; and CoDense™ for additional code density enhancement on top of RISC-V C-extension.

AndesCore AX25 is equipped with RISC-V P-extension (RVP) ISA to efficiently manipulate multiple data sets simultaneously in one instruction and assist various AI computations. It is also perfect for control-oriented tasks with features such as dynamic branch prediction, instruction/data caches and local memories for low-latency accesses. ECC soft error protection is also supported. Complementing the hardware is AndeSight™, a feature-rich and intuitive integrated development environment. Furthermore, Andes Custom Extension™ (ACE) is a powerful framework to enable custom instruction design to realize domain specific acceleration with high degree of programmability within a reduced development time.

About Andes Technology

Fifteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, dual-issue and/or multicore capabilities. The annual volume of Andes-Embedded SoCs is exceeding 2 billion since 2020. For more information, please visit https://www.andestech.com.