English
SEGGER introduces new Open Flashloader for direct programming of any RISC-V system
January 12, 2021 -- SEGGER just released a new Open Flashloader for RISC-V systems. The template, which can be adjusted to fit any RISC-V system, allows engineers to write flash loaders which fit into just 2kB of RAM.
This enables J-Link debug probes to download directly and easily into the flash memory of a RISC-V Microcontroller or SoC. At the same time it provides a solution for mass production programming using the Flasher series of flash programmers.
| Ad |
RISC-V-based SoC template  Low-power 32-bit RISC-V processor  Compact, efficient 64-bit RISC-V processor with 5-stage pipeline  |
These flash loaders work with any software supporting J-Link, from simple command line programs such as J-Link Commander, to debuggers such as GDB or SEGGER's Ozone, or more production-oriented utilities such as J-Flash, and development tools such as Embedded Studio. The J-Link GDB Server enables the use of GDB, Eclipse and any debugger supporting the GDB protocol.
When debugging with the J-Link Plus, Ultra+ or PRO models, an unlimited number of breakpoints in flash memory are available.
“We are seeing RISC-V gain more and more traction in the market, especially in China,” says Rolf Segger, founder of SEGGER. “Now even very small RISC-V systems can be programmed at blistering speed using SEGGER J-Link and Flasher. I think the convenience and performance of J-Link is industry leading, boosting developer productivity. With J-Link debugging and flash programming, a complete ecosystem of tools is available".”
Any qualified engineer can write a flash loader for J-Link and RISC-V, usually within a day or two. SEGGER also offers the service of writing flash loaders for particular devices where desired.
Proven flash loaders can be added to the J-Link software, so that they will simply work out of the box.
More information on J-Link Flasher loaders can be found here:
|
||||||
Related News
- SiFive Highlights Key Inflection Points Driving RISC-V Adoption for AI and Introduces Intelligence XM Series for AI Workload Acceleration
- SEALSQ Introduces QS7001, a Newly Developed Cutting-Edge RISC-V Secure Hardware Platform, Specifically Designed for IoT security in the Post-Quantum Era
- X-Silicon Introduces the World's First Vulkan Driver Implementation for RISC-V, Enabling an entire Ecosystem of 3D Graphics, AI and Compute for Low-Power, Mobile, Edge and IOT Devices
- Codasip introduces best-in-class RISC-V core for power-efficient applications
- Renesas Introduces Industry's First General-Purpose 32-bit RISC-V MCUs with Internally Developed CPU Core
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
|
E-mail This Article | 
|
|
Printer-Friendly Page |