Mentor Graphics Unveils PCI Express Configurable Controller

INTEL DEVELOPER FORUM, SAN JOSE, February 18, 2003 - Mentor Graphics Corporation (Nasdaq: MENT) today announced a PCI Express configurable controller core to accelerate the development of subsystems supporting the PCI ExpressTM serial interconnect technology.  To help designers validate the functional compliance, Mentor also provides an in-circuit emulation PCI Express verification solution powered by the Mentor Graphics® emulation systems VStationTM and CelaroTM.

PCI Express technology is quickly emerging as the high-speed interconnect standard for applications in next generation computing, server, storage, and communications products.  A reference design demonstrating the core working in a PCI Express bridge application will be shown today in the PCI Express Pavilion, Booth 109, at the Intel Developer Forum.  (Please see the press release:  Mentor Graphics and Altera Deliver PCI Express Reference Design, Feb. 18, 2003.)

"Mentor Graphics continues to be at the forefront of standards-based design and compliance and our reference design for PCI Express architecture continues this legacy," said Mike Kaskowitz, general manager of Mentor Graphics Intellectual Property (IP) division.  "Our customers rely on our products to slice months off their product design and verification cycles, and tighter integration with our emulation team ensures that they have access to the industry's best resources."

"The availability of high quality IP is a key enabler to the wide scale market adoption of PCI Express," said Jason Ziller, Technology Initiatives manager for Intel Corporation.  "The demonstration of a working bridge application is a testament to the industry's progress in developing PCI Express solutions.  We're happy to see Mentor Graphics participate in Intel's first PCI Express community at IDF."

A Complete Solution for PCI Express Product Development
The Mentor Graphics PCI Express roadmap includes full support for the specification including endpoint, legacy endpoint, bridges, switch, advanced switches and root complex configurations.  The IP is designed to be very flexible with a rich set of configurable features to allow the IP to be tuned for particular applications and bandwidths.  Configurable options include the number of virtual channels, the number of lanes (up to 32) and links per port (up to 32) and the maximum payload size.  Flow control is provided for different types of traffic, for instance allowing "cut-through" transfer of time critical data.  The first IP release will be capable of supporting PCI Express Endpoints and bridges from one to four lanes in width.

The configuration running in the reference design has the following capabilities derived from the one to four lane configurable core:
* Full protocol support
* Link layer
* Transaction layer
* Data link layer
* Configuration registers
* PIPE Interface to SERDES PHY
* Configurable Tx, Rx and Retry buffer

The PCI Express core leverages Mentor Graphics' considerable experience in bringing validated standards-based IP to market.

Proving Functional Compliance with the Power of In-circuit Emulation
With new interface standards like PCI Express, functional compliance testing has proven to be difficult and time consuming.  With Mentor Graphics PCI Express verification solution, iSOLVETM for the PCI Express solution, SoC designs can be tested with real PCI and PCI Express applications.  The in-circuit emulation solution bridges real world, full speed PCI and PCI Express bus cycles into PCI Express cycles in Mentor's VStation and Celaro emulation platforms.  This leading edge verification capability makes it possible to use existing test platforms and software to simplify and speed up the process of functional compliance testing.  By providing engineers the design IP and verification solution, Mentor is solving the hardware prototyping challenge and mitigating the risk associated with developing designs with the latest PCI Express interface.

About Mentor Graphics
Mentor Graphics Corporation (Nasdaq: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies.  Established in 1981, the company reported revenues over the last 12 months of about $600 million and employs approximately 3,500 people worldwide.  Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, California 95131-2314. World Wide Web site: www.mentor.com.

Mentor Graphics is a registered trademark and Inventra and VStation and iSolve are trademarks of Mentor Graphics Corporation.  All other company or product names are the registered trademarks or trademarks of their respective owners.

###