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180nm OTP Non Volatile Memory for Standard CMOS Logic Process
VLIW on AMBA
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VLIW on AMBA
By David Larner, Embedded Systems
August 23, 2001 (11:45 a.m. EST)
URL: http://www.eetimes.com/story/OEG20010823S0030
Siroyan is to deploy ARM's open standard Advanced Microcontroller Bus Architecture (AMBA), both in its first synthesisable core (a "soft core") - code-named Rubicon and its first test chip - code-named Spey. The test chip will be manufactured later this year on UMC's 0.15micron process. Siroyan's processor uses a very long instruction word (VLIW) architecture -- code-named Opus. This combines scalable high-performance DSP and RISC functionality in a single core, together with memory management elements.
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