Synopsys AI-Driven Design System Enables Renesas to Achieve Breakthrough in Productivity
DSO.ai Autonomously Identifies Best PPA Solutions in Automotive Chip Designs
MOUNTAIN VIEW, Calif., April 15, 2021 -- Synopsys, Inc. (Nasdaq: SNPS) today announced the adoption of DSO.ai™ (Design Space Optimization AI), Synopsys' award-winning autonomous artificial intelligence (AI) design system, by Renesas into its advanced automotive chip design environment. With DSO.ai's reinforcement learning technology, Renesas can augment its ability to search vast design spaces for better performance-power-area (PPA) solutions, pushing the envelope on energy efficiency for advanced automotive ICs without forgoing operating frequency. This enables Renesas to explore a larger scale of choices in existing chip design workflows, paving an accelerated path to meeting PPA targets.
"Our collaboration with Synopsys on DSO.ai exemplifies how AI can lead to disruptive design solutions, revolutionizing the way we design automotive products," said Satoshi Shibatani, director, Digital Design Technology Department, shared R&D EDA division at Renesas. "We expect that DSO.ai will identify better PPA solutions, and going forward, we are excited to expand our collaboration with Synopsys to unlock higher productivity for our design teams."
Synopsys' DSO.ai solution demonstrates AI technology advantages and accelerates the process of searching for optimal solutions by enabling autonomous optimization of broad design spaces. The DSO.ai engines ingest large data streams generated by chip design tools and use them to explore search spaces, observe how a design evolves and adjust design choices, silicon-technology parameters and workflows to guide the exploration process towards multi-dimensional optimization objectives. AI makes it possible to standardize reuse across the organization, enabling design teams to consistently operate at expert levels and maximize compute resources' efficiency. With Synopsys DSO.ai, design teams can reimagine the chip design workflow to achieve better PPA, maximize the benefits of silicon process technologies, and slash lead times to bringing new or derivative products to market.
"Synopsys is committed to innovation leadership and working closely with leading semiconductor companies, like Renesas, on AI design technology," said Stelios Diamantidis, senior director of Artificial Intelligence solutions at Synopsys. "In only its first year in the market, DSO.ai has already helped many customers achieve better PPA solutions in dozens of design projects – all at a fraction of the time and effort typically involved. AI is giving EDA a new dimension for addressing the increased complexity of silicon technologies, accelerating product timelines, and enabling engineering teams to scale."
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As an S&P 500 company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and offers the industry's broadest portfolio of application security testing tools and services. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing more secure, high-quality code, Synopsys has the solutions needed to deliver innovative products. Learn more at www.synopsys.com.
|
Synopsys, Inc. Hot IP
Synopsys, Inc. Hot Verification IP
Related News
- Synopsys Advances State-of-the-Art in Electronic Design with Revolutionary Artificial Intelligence Technology
- Cadence Verisium AI-Driven Verification Platform Accelerates Debug Productivity for Renesas
- Cadence Revolutionizes System Design with Optimality Explorer for AI-Driven Optimization of Electronic Systems
- Synopsys Achieves Certification of its AI-driven Digital and Analog Flows and IP on Samsung Advanced SF2 GAA Process
- Synopsys Adds AI-Driven Tools, Acquires PUF Security Firm
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |