PUFsecurity and Andes Technology Cooperate to Integrate Crypto Coprocessor PUFiot into RISC-V AIoT Security Platform
Taiwan -- June 2nd, 2021 -- PUFsecurity, a security solutions IP company, and Andes Technology (TWSE: 6533), a leading RISC-V CPU IP vendor, are the first to incorporate PUFsecurity’s PUFiot crypto coprocessor with Andes Technology’s D25F CPU and its associated platform AE350. With this successful integration, PUFiot will become a part of the AndeSentry™ security framework from Andes Technology, offering a rich set of security solutions for the RISC-V ecosystem.
PUFsecurity jointly develops the security solution PUFiot with eMemory (TWSE: 3529), combining eMemory’s innovative NeoPUF, a physically unclonable function (PUF) that could be the chip fingerprint, along with the leading anti-fuse one-time programmable (OTP) memory, NeoFuse, and PUFsecurity’s root of trust and NIST CAVP-certified cryptographic engines (including symmetric/asymmetric ciphers, hashes, key wrapping, message authentication, etc.). Featuring multiple analog/digital anti-tampering designs to prevent both invasive attacks (such as those utilizing focused ion beam, FIB) and non-invasive ones (such as side-channel analysis), PUFiot provides a solid security boundary for chip protection.
Using PUF-derived chip fingerprints to internally generate key pairs and inborn IDs, PUFiot lowers the cost of supporting zero-touch deployment to meet the secure onboarding requirements of AI/IoT/5G multi-terabyte, networked devices. In other words, PUFiot can assist cloud-based application ecosystems in achieving zero-trust compliant security operations.
Andes Technology’s RISC-V D25F is a 32-bit high-performance processor core that supports single/double-precision floating-point operations, RVP P-extension (DSP/SIMD) instructions and Physical Memory Protection (PMP). The pre-integrated AE350 platform comprises AHB/AXI bus matrix, interrupt control, debug module, and commonly used peripherals such as GPIO, I2C, PWM, QSPI, UART, and WatchDog Timer. It greatly simplifies the SoC construction for customers. D25F processor with the AE350 platform have already been licensed to many customers for use in a broad range of market, including the emerging AIoT applications.
AndeSentry™ security framework enables open collaboration and brings out a variety of security solutions. Now included in AndeSentry™, PUFiot provides secure storage, root of trust, and hardware cryptographic engines. When integrated with the D25F+AE350 platform, PUFiot supports system-level security features such as secure boot/OTA (over-the-air) updates and firmware/software protection. The combined solution is ideal for the growing secured AIoT applications.
The successful partnership between Andes Technology and PUFsecurity is a significant milestone for the security IP industry, which will lead to the development of even more cost-effective hardware security solutions for the RISC-V ecosystem.
About PUFsecurity
PUFsecurity is a subsidiary of eMemory and is dedicated to innovating PUF-based security solutions. By leveraging our technical acumen and achievements, including core IPs such as NeoPUF and OTP from eMemory, PUFsecurity brings PUF-based security to the market. The latest solutions include the integrated, five-in-one hardware root-of-trust module (PUFrt) and PUF-based crypto co-processor (PUFiot). PUFsecurity offers hardware security IP solutions with superior performance and cost-efficiency in a wide range of process nodes with our proven industry expertise.
For more information please visit: http://www.pufsecurity.com
About Andes Technology
Sixteen years in business and a Founding Premier member of RISC-V International, Andes is a leading supplier of high-performance/low-power 32/64-bit embedded processor IP solutions, and a main force to take RISC-V mainstream. Andes’ fifth-generation AndeStar™ architecture adopted the RISC-V as the base. Its V5 RISC-V CPU families range from tiny 32-bit cores to advanced 64-bit cores with DSP, FPU, Vector, Linux, superscalar, and/or multicore capabilities. The annual volume of Andes-Embedded SoCs has exceeded 2 billion since 2020 and the cumulative volume has reached 7 billion.
For more information, please visit https://www.andestech.com.
About RISC-V AndesCore™
Andes Technology's comprehensive CPU includes entry-level, mid-range, high-end, extensible and security families to address the full range of embedded electronics products, especially for connected, smart and green applications. From 2017, Andes expands its product line to RISC-V processors and provides a total solution in V5 family cores, including N22, N25F/NX25F, D25F, A25/AX25, A25MP/AX25MP, A27/AX27/NX27V, A45/D45/N45 and AX45/DX45/NX45.
For more information about Andes Technology, please visit: http://www.andestech.com/
|
PUFsecurity Hot IP
Related News
- PUFsecurity Collaborate with Arm on PSA Certified RoT Component Level 3 Certification for its Crypto Coprocessor to Provide Robust Security Subsystem Essential for the AIoT era
- Andes Technology and Tiempo Secure Announce Strategic Partnership to Enhance RISC-V Platform Security up to CC EAL5+ Certification
- Jmem Tek and Andes Technology Partner on the World' s First Quantum-Secure RISC-V Chip
- HighTec C/C++ Compiler Suite Supports Andes' ISO 26262 Certified RISC-V IP for Automotive Safety and Security Applications
- SEALSQ Introduces QS7001, a Newly Developed Cutting-Edge RISC-V Secure Hardware Platform, Specifically Designed for IoT security in the Post-Quantum Era
Breaking News
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
Most Popular
E-mail This Article | Printer-Friendly Page |