Rambus to Acquire AnalogX, Accelerating Next-Generation Data Center Interface Solutions
SAN JOSE, Calif. – June 16, 2021 – Rambus Inc. (NASDAQ: RMBS), a provider of industry-leading chips and silicon IP making data faster and safer, today announced it has signed an agreement to acquire AnalogX, the leading provider of low power multi-standard connectivity SerDes IP solutions. This acquisition augments the Rambus family of PCIe 5.0 and 32G Multi-protocol PHYs with SerDes technology specifically built for ultra-low power and very low latency, expanding the addressable applications and available process nodes. AnalogX’s expertise in DSP-based design and PAM4 signaling accelerates the Rambus roadmap for PCIe 6.0 and CXL 3.0 solutions and will provide critical building blocks for the CXL Memory Interconnect Initiative.
“As data centers move to a disaggregated model, high-speed connectivity will be instrumental to unleashing the performance of data-intensive computing platforms,” said Luc Seraphin, president and CEO of Rambus. “The industry-leading PHYs and DSP design expertise from AnalogX will feed our roadmap for data center interconnect chips and expand our reach to new applications across data center, AI/ML and 5G.”“AnalogX’s product, technology and team are an ideal fit with Rambus,“ said Robert Wang, president and CEO of AnalogX. “We’re thrilled to join a company with such a rich history on innovation and look forward to continuing our technical leadership and providing premier integrated solutions for next-generation products.”
The transaction is expected to close in the third calendar quarter of 2021. Although this transaction will not materially impact 2021 results due to the expected timing of close and acquisition accounting, Rambus expects this acquisition to be accretive in 2022.
|
Related News
- Rambus to Acquire Hardent, Accelerating Roadmap for Next-Generation Data Center Solutions
- Rambus Delivers Quantum Safe IP Solutions with Next-Generation Root of Trust for Data Center Security
- Rambus Delivers PCIe 6.0 Interface Subsystem for High-Performance Data Center and AI SoCs
- Cadence to Acquire Future Facilities, A Pioneer in Data Center Digital Twins
- Western Digital Accelerates Leadership in Next-Generation Data Center Architectures With Acquisition of Kazan Networks
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |