Barcelona Announces Powerful Design Trade-Off Analysis in New Prado Synthesis Platform Release
Update: Barcelona has been bought by Synopsys
Newark, Calif., March 5, 2003 - Barcelona Design Inc., the leading provider of synthesizable full-custom analog IP solutions, today announced the release of version 1.2 of its Prado™ analog synthesis platform. Earlier versions of this product have been shipped to leading semiconductor vendors; this new release significantly expands its ability to rapidly produce product-specific analog IP block for SoCs.
The Prado™ Platform works with Barcelona's portfolio of IP engines to synthesize customized, tapeout-ready IP instances. Version 1.2 of the Prado™ Synthesis Platform offers several new features, including sophisticated trade-off analysis (TOA) capabilities.
TOA allows the designer to quickly evaluate performance trade-offs between different automatically synthesized circuits to determine how to best satisfy system-level requirements. For example, used together with the Miró™ class of clocking engines, the user can evaluate the correlation between power, area and various jitter performance measures for a given frequency specification at the click of a button. TOA automatically generates the different feasible circuit candidates, and the user can subsequently choose the circuit that best satisfies his specific application requirement.
In addition to enabling trade-offs within the PLL core itself, the Prado™ platform allows optimization of requirements at the system level. For example, by analyzing changes in a PLL's reference frequency (i.e. the external crystal oscillator specification) versus PLL area/cost and jitter performance, a system designer can determine optimal PLL specifications in order to optimize SoC performance/cost trade-offs.
For more information on this product, contact Barcelona at 510-897-1800 or send an email to info@barcelonadesign.com.
About Barcelona Design, Inc.
Barcelona Design is the leading supplier of synthesizable full-custom analog IP, offering unique semiconductor intellectual property complemented by powerful design technology. Barcelona was founded in 1999 by CTO Dr. Mar Hershenson and Stanford University professor Dr. Stephen Boyd as a result of their research on the application of convex optimization mathematics to analog circuit design. The firm's analog circuit solution enables electronics companies to implement complex intellectual property (IP) instances radically faster than ever before. The company has proven its technology with working silicon, and has demonstrated market acceptance of its innovative approach by winning key customers, including Mitsubishi and ST Microelectronics. Barcelona has secured financing from leading venture capitalists including, Crosslink Capital, Sequoia Capital and Foundation Capital. The firm is headquartered in Newark, CA. For more information please visit www.barcelonadesign.com.
|
Related News
- Rambus Cryptography Research Unveils Latest Release of DPA Workstation Analysis Platform
- Knowlent Ensures Analog Sign-Off With Latest Opal Verification Platform; New 4.0 Release Offers Testbench for Up-coming PCI Express Gen 2 Standard
- New Automotive Grade Linux Platform Release Adds Cloud-Native Functionality, RISC-V Architecture and Flutter-Based Applications
- Efabless Announces the Release of the OpenLane 2 Development Platform, Transforming Custom Silicon Design Flows
- OKI IDS adopts Siemens Catapult High-Level Synthesis platform for design and verification services
Breaking News
- Baya Systems Raises $36M+ to Propel AI and Chiplet Innovation
- Andes Technology D45-SE Processor Achieves ISO 26262 ASIL-D Certification for Functional Safety
- VeriSilicon and Innobase collaboratively launched second-generation Yunbao series 5G RedCap/4G LTE dual-mode modem IP
- ARM boost in $100bn Stargate data centre project
- MediaTek Adopts AI-Driven Cadence Virtuoso Studio and Spectre Simulation on NVIDIA Accelerated Computing Platform for 2nm Designs
Most Popular
- Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
- Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
- Cadence to Acquire Secure-IC, a Leader in Embedded Security IP
- Blue Cheetah Tapes Out Its High-Performance Chiplet Interconnect IP on Samsung Foundry SF4X
E-mail This Article | Printer-Friendly Page |