Cypress Develops World's Highest-Density Networking SRAM On 90-nm Process Technology
RAM9™ Process Technology Achieves Functional Silicon of 72-Mbit Synchronous SRAMs
SAN JOSE, Calif., March 10, 2003 – Cypress Semiconductor Corporation (NYSE: CY), a leading SRAM supplier, today announced that its six-transistor 90-nm (0.09-micron) RAM9™ process technology has achieved functional silicon of the world's highest-density SRAM. Operating at OC-48 speeds and above, the 72-Mbit synchronous SRAM supports next-generation networking applications.
"The development of the 72-Mbit synchronous SRAM on a 90-nm footprint solidifies our leadership in both the networking SRAM market and technology innovation," said Antonio Alvarez, senior vice president for Cypress's Memory Products Division. "Offering the highest-density SRAM in the market today, this product is the first of many to be migrated onto the RAM9 process by the end of the year."
"Communication customers continue to seek higher-density, cost-effective SRAMs for high-speed networking applications," said Betsy Van Hees, senior memory analyst for iSuppli Corporation. "With Cypress's recent development of the 72-Mbit synchronous SRAM on 90-nm process technology, they have proven their ability to be a leader in the SRAM market. Cypress now offers a leading-edge product that is ahead of their competition."
RAM9 is being implemented in Cypress's Fab 4 in Bloomington, Minnesota. In addition to the 72-Mbit synchronous SRAM, two other product families are currently in design and will achieve functional silicon by late 2003 and early 2004. These product families include Cypress's next-generation networking Quad Data Rate™ (QDR™) SRAMs that operate at data rates beyond 300-MHz; and low-power More Battery Life™ (MoBL™) SRAMs, which use less power than standard SRAMs.
Samples
Samples of the 72-Mbit synchronous SRAMs will be available during the second half of 2003.
About Cypress
Cypress Semiconductor Corporation (NYSE: CY) is Connecting from Last Mile to First Mile™ with high-performance solutions for personal, network access, enterprise, metro switch, and core communications-system applications. Cypress Connects™ using wireless, wireline, digital, and optical transmission standards, including Bluetooth, USB, Fibre Channel, SONET/SDH, Gigabit Ethernet, and DWDM. Leveraging its process and system-level expertise, Cypress makes industry-leading physical layer devices, framers, and network search engines, along with a broad portfolio of high-bandwidth memories, timing technology solutions, and programmable microcontrollers. More information about Cypress is accessible online at www.cypress.com.
"Safe Harbor" Statement under the Private Securities Litigation Reform Act of 1995: Statements herein that are not historical facts are "forward-looking statements" involving risks and uncertainties, including but not limited to: the effect of global economic conditions, shifts in supply and demand, market acceptance, the impact of competitive products and pricing, product development, commercialization and technological difficulties, and capacity and supply constraints. Please refer to Cypress's Securities and Exchange Commission filings for a discussion of such risks.
Quad Data Rate™ SRAM and QDR™ SRAM comprise a new family of products developed by Cypress, IDT, Micron Technology, Inc., NEC, and Samsung. Hitachi has signed a letter of intent to join the QDR co-development team and is currently finalizing a formal agreement with the other QDR team members.
Cypress and the Cypress logo are registered trademarks of Cypress Semiconductor Corporation. "Connectivity from Last Mile to First Mile," "Cypress Connects," More Battery Life, MoBL, and RAM9 are trademarks of Cypress. All other trademarks are the property of their respective owners.
|
Related News
- Altera Demonstrates 90-nm Leadership by Shipping World's Highest-Density, Highest-Performance FPGA
- IBM, Chartered Select Synopsys' Hi-Speed USB 2.0 and OTG PHYs for Their 90-nm Process Platform
- Altera Begins Shipping Industry's First High-Density 90-nm FPGAs to Customers
- SkyWater Announces Availability of SRAM Memory Compiler for 90 nm Strategic Rad Hard by Process Offering
- Disruption in library offering for the 90 nm LP process with Dolphin Integration's new generation of High Density Standard Cells
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |