Intel backs RISC-V for Nios FPGA processor
By Nick Flaherty, eeNews Europe (October 06, 2021)
Intel's Nios V soft processor for its FPGAs uses the RISC-V: RV32IA architecture with atomic extensions, 5-stage pipeline and AXI4 interfaces.
Intel has developed a soft IP microcontroller core for its FPGAs using the oipen source RISV-V instruction set
The Nios V processor is the next generation of soft processor for Intel’s Cycline, Stratix and Aria FPGAs based on the open-source RISC-V Instruction Set Architecture. This processor is available in the Intel Quartus Prime Pro Edition Software starting with version 21.3. This follows the 32bit Nios II, launched over a decade ago by Altera in Quartus 8.
E-mail This Article | Printer-Friendly Page |
|
Related News
- Intel launches compact RISC-V Nios processor core
- Achronix FPGAs Add Support for Bluespec's Linux-capable RISC-V Soft Processors to Enable Scalable Processing
- Bluespec, Inc. Releases Ultra-Low Footprint RISC-V Processor Family for Xilinx FPGAs, Offers Free Quick-Start Evaluation.
- AndesBoardFarm Enables SoC Designers to Explore RISC-V Processors in Online FPGA Board Collection
- Bluespec, Inc. Joins the Xilinx Partner Program, Offering Drop-in Ready RISC-V Processors for Xilinx FPGAs
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models