MIPI RFFE (RF Front-End Control Interface) v3.0 Master and Slave Controller IP Cores for ultimate control of your RF Front-end Cellular or Base station SoC's with Low Power Consumption and Reduced Latencies
19th October 2021. – T2MIP, the global independent semiconductor IP Cores provider & Technology experts, is pleased to announce the immediate availability of its partner’s MIPI RFFE v3.0 Master and Slave Controller IP Cores which are mature, proven and in production chips with High performance and low power consumption support.
MIPI RFFE v3.0 Controller IP Core, is the standard interface for control of radio frequency (RF) front-end (FE) subsystems. It delivers swift, agile, self-regulating, and complete control of the complex RF subsystem environment. The MIPI RFFE Master/ Slave Controller IP Core is a full-featured, easy-to-use, synthesizable design that is easily integrated into any SoC or FPGA development. It can also support a variety of host bus interfaces for easy adoption into any design architecture – AXI, AHB, APB, OCP, VCI, Avalon, PLB, Wishbone or custom buses. MIPI RFFE v3.0 is also backward compatible with all prior generations
RFFE is a two-wire interface that uses non-terminated, single-ended CMOS I/Os for lower power. It can be used with a broad range of bus operating frequencies and Supports Command Frame, Data/Address Frame, No Response Frame, Bus ownership transfer, Interrupt polling, Master write and read, multi-master configuration, support for carrier aggregation and the use of multiple transceivers, dual-SIM designs and reserved registers that improve the efficiency of hardware and software development.
MIPI RFFE v3.0 IP core, is designed to provide more accurate timing precision and reduced latencies needed for the technical advancement of 5G. The MIPI RFFE IP core provides a simplified, fast, and more comprehensive control over the RFFE subsystems and deliver the specific capabilities necessary for traditional sub-6 GHz cellular bands. MIPI RFFE v3.0 IP core delivers enhanced triggering features and functionality for synchronizing and scheduling changes in register settings across multiple devices enabling a better ecosystem along with 5G, LTE, GNSS, Nb-IoT, SDR or any other RF components.
MIPI RFFE Master/Slave Controller IP cores along with RF Front-End IPs have been used in semiconductor industry’s Cellular Electronics, IoT, Automotive, Industrial, Broadcast etc…
In addition to MIPI RFFE IP Cores, T2M ‘s broad silicon Interface IP Core Portfolio includes USB, HDMI, Display Port, MIPI (CSI, DSI, UniPro, UFS, Soundwire, I3C), PCIe, DDR, 10/100/1000 Ethernet, V by One, Serial ATA, programmable SerDes, and many more, available in major Fabs in process geometries as small as 7nm. They can also be ported to other foundries and leading-edge processes nodes on request.
Availability: These Semiconductor Interface IP Cores are available for immediate licensing either stand alone or with pre-integrated Controllers. For more information on licensing options and pricing please drop a request / MailTo
About T2M: T2MIP is the global independent semiconductor technology experts, supplying complex semiconductor IP Cores, Software, KGD and disruptive technologies enabling accelerated development of your Wearables, IOT, Communications, Storage, Servers, Networking, TV, STB and Satellite SoCs. For more information, please visit: www.t-2-m.com
|
T2M Hot IP
- Bluetooth Dual Mode v5.4 / IEEE 15.4 PHY/RF IP in TSMC22nm ULP
- GNSS Ultra low power (GPS, Galileo, GLONASS, Beidou3, QZSS, IRNSS, SBAS) Digital ...
- USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+
- DVB-S2X WideBand Demodulator & Decoder IP (Silicon Proven)
- MIPI D-PHY Tx IP, Silicon Proven in TSMC 22ULP
Related News
- MIPI RFFE v3.0 Delivers Tighter Timing Precision and Reduced Latencies Needed for Successful 5G Rollouts
- MIPI RFFE Master & Slave Controller IP Cores to control your complex RF-Front End Interfaces
- Embrace the future of sensor communication in your SoC with proven MIPI I3C SMaster, Master, and Slave Controller IP Cores. Licensing opportunities are available for immediate implementation
- Upgrade Your Display and Camera SOC's with proven MIPI C-D Combo PHY and CSI / DSI Controller IP Cores for both Tx and Rx
- MIPI Alliance Updates its MIPI RFFE Interface for Mobile Device RF Front-End Architectures
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |