Analog Compute is Key to The Next Era of AI Innovation
By Tim Vehling, Mythic
EETimes (January 5, 2022)
As AI applications become more popular in a growing number of industries, the need for more compute resources, more model storage capacity and, at the same time, lower power consumption is becoming increasingly important. Today’s digital processors used for AI applications struggle to deliver these challenging requirements, especially for large machine learning models running at the edge. Analog compute offers an innovative solution, enabling companies to get more performance at lower power consumption in a small form factor that’s also cost efficient.
The computational speeds and power efficiency of analog compared to digital have been promising for a long time. Historically, there has been a number of hurdles to developing analog systems, including the size and cost of analog processors. Recent approaches have shown that pairing analog compute with non-volatile memory (NVM) like flash memory – a combination called analog compute in-memory (CIM) – can eliminate these hurdles.
Unlike digital computing systems that rely on high-throughput DRAM that consumes too much power, analog CIM systems can take advantage of the incredible density of flash memory for data storage and computing. This eliminates the high power consumption that comes with accessing and maintaining data in DRAM in a digital computing system. With the analog CIM approach, processors can perform arithmetic operations inside NVM cells by manipulating and combining small electrical currents across the entire memory bank in a fast and low-power manner.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
Related News
- SiFive Announces Differentiated Solutions for Generative AI and ML Applications Leading RISC-V into a New Era of High-Performance Innovation
- JEDEC and Open Compute Project Foundation Pave the Way for a New Era of Chiplet Innovation
- Arm and NVIDIA: Fueling Innovation for the Next Era of Compute
- Why UCIe is Key to Connectivity for Next-Gen AI Chiplets
- Baya Systems Raises $36M+ to Propel AI and Chiplet Innovation
Breaking News
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- Veriest Solutions Strengthens North American Presence at DVCon US 2025
- Intel in advanced talks to sell Altera to Silverlake
- Logic Fruit Technologies to Showcase Innovations at Embedded World Europe 2025
- S2C Teams Up with Arm, Xylon, and ZC Technology to Drive Software-Defined Vehicle Evolution
Most Popular
- Intel in advanced talks to sell Altera to Silverlake
- Arteris Revolutionizes Semiconductor Design with FlexGen - Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- YorChip announces Low latency 100G ULTRA Ethernet ready MAC/PCS IP for Edge AI
- AccelerComm® announces 5G NR NTN Physical Layer Solution that delivers over 6Gbps, 128 beams and 4,096 user connections per chipset