ZeroPoint Technologies signs Memory Booster contract
Gothenburg, Sweden – February 28, 2022 – ZeroPoint Technologies AB today announced that they have won their first Memory Booster IP licensing contract with a global semiconductor developer. ZeroPoint Technologies provides the world’s only available Memory Booster IP block for System on Chips (SoCs), effectively doubling a computer’s main memory capacity and memory bandwidth; providing significantly more performance per watt. This contract is an important milestone in building confidence and awareness in their new product line, “Ziptilion™.
The most challenging bottlenecks in computing typically stem from memory capacity and bandwidth. ZeroPoint Technologies overcomes these bottlenecks. We provide Ziptilion™ – a memory booster technology for Servers and Smart devices. Ziptilion™ is not another memory, it is an innovative patented technology that doubles the capacity and bandwidth to existing memory technologies at unmatched energy efficiency.
Worldwide, servers were consuming about 1% (2019) of global electricity and this is predicted to increase to 4% within a few years. ZeroPoint’s technology can drastically increase the energy efficiency of Servers. A typical data center consuming 1 TWh/year, could save up to 20% on energy cost. Our technology increases system performance per watt significantly, at lower CAPEX and OPEX.
“ZeroPoint Technologies’ vision is to enable high performance Servers and Smart devices that are environmentally friendly. Memory bottlenecks are a tremendous challenge for SoC developers, and we mitigate this challenge by doubling main memory capacity and memory bandwidth. Systems with memory booster technology are environmentally friendly and financially effective. By putting unused memory to work we can deliver up to 50% more performance per watt. And this is the single most important metric to high performance Servers and Smart devices.”, says ZeroPoint Technologies CEO Klas Moreau.
ZeroPoint Technologies’ IP block is easy to integrate with existing industry standard on-chip-bus-protocols. The IP-block is placed on the memory access path and is invisible to the operating system and applications. Thanks to the ultra-tuned compression/decompression accelerators and that data is compressed when fetched from memory, the memory access latency is often shorter with Ziptilion™ than without.
ZeroPoint Technologies is a spinout from Chalmers University of Technology in Gothenburg, Sweden, and has over the years developed an impressive IP Portfolio in the memory compression domain. Their patented compression technology is based on 15 years of research. Today the company works with industry leaders on product implementation projects and technical evaluations.
About ZeroPoint Technologies AB
The company was founded by Professor Per Stenström and Angelos Arelakis PhD, with the vision to deliver the most efficient memory compression available, in real-time, based on state-of-the-art research. ZeroPoint Technologies AB is a privately held Limited Company, based in Gothenburg. ZeroPoint Technologies provide Ziptilion™, the world’s only available real time memory compression IP for SoCs.
|
ZeroPoint Technologies Hot IP
Related News
- ZeroPoint Technologies signs Memory Encryption contract
- ZeroPoint Technologies Releases New Hardware-Accelerated Memory Optimization Solutions and Receives Industry Recognition for Innovation
- Raaam signs lead licensee for SRAM replacement technology
- ZeroPoint Technologies Closes Funding Round for Groundbreaking Hardware-Accelerated Memory Compression Technology
- ZeroPoint Technologies Signs Global Customer to Bring Hardware-Accelerated Compression to Hyperscale Data Centers
Breaking News
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |