oneNav Announces pureL5 GNSS Digital IP Core and Customer Evaluation System - World's First Single Frequency L5 GNSS Receiver
oneNav delivers pureL5 RTL to first SOC licensee for tape out; pureL5 Customer Evaluation System is currently being tested by California and Chinese companies
Palo Alto, California, March 3, 2022 — oneNav is pleased to announce the commercial availability of its pureL5 GNSS digital IP core. The pureL5 digital IP core’s breakthrough architecture enables it to directly acquire and track L5 signals from GPS, Galileo, BeiDou, QZSS and GLONASS without any L1 aiding. This eliminates the entire L1 RF chain, saves PCB area and simplifies the RF front end and antenna subsystem in smartphones, wearables and trackers. The pureL5 digital IP core’s massively parallel array processor searches the entire 1 millisecond L5 code space in parallel, delivering 1 second TTFFs. The pureL5 digital IP core is only 0.28mm2 in the 3nm semiconductor process, and consumes only 4.7mW of power in 1Hz tracking mode.
oneNav has delivered the pureL5 digital IP core RTL to its first SOC customer. IP core RTL verification and physical implementation are complete, and oneNav’s SOC licensee will tape out in Q1, 2022. The pureL5 digital IP core RTL is available for customer licensing and shipment now.
oneNav’s pureL5 Customer Evaluation System (CES) is currently being tested by companies in California and China. The CES is available for smartphone and wearables OEMs and SOC providers who want to evaluate oneNav’s pureL5 in the field and the lab. Please contact oneNav to learn more about the CES Program.
Single frequency L5 GNSS with competitive TTFF, power and size has never been achieved before now. oneNav has broken this barrier.
pureL5 GNSS — all the benefits of high performance, next generation L5 in a single frequency L5 receiver
- Smaller footprint than L1+L5 hybrids, simplifying implementation in highly spaceconstrained devices like 5G smartphones and wearables
- Lowers BOM cost and simplifies the RF front end and antenna subsystem by eliminating the entire L1 RF chain
- No L1 aiding required—directly acquires L5/E5/B2 with 1 second TTFF
- Less software complexity, simplifies RF coexistence engineering
- Better interference resiliency
- Scalable IP signal processing core is semiconductor process node independent
- Multi-constellation L5—Beidou, Galileo, GPS, QZSS, GLONASS
About oneNav
oneNav is powering high performance positioning for location dependent mobile services. Based in Silicon Valley, California, oneNav is developing the next generation pureL5 GNSS receiver for smartphones, wearables and tracking devices. oneNav’s team comprises top GNSS experts from Qualcomm, Apple, Intel, SnapTrack, SiRF, Trimble and eRide, with decades of GNSS and mobile industry experience. oneNav’s team of 45 people has extensive experience in GNSS system architecture, multipath mitigation, signal processing, ASIC design and AI/machine learning, and has collectively filed over 300 career GNSS patents. Investors include Google Ventures, Norwest Venture Partners and GSR Ventures. To learn more, please visit www.onenav.ai.
|
Related News
- oneNav Announces Competitive pureL5 Field Test Performance Using its Latest Customer Evaluation System (CES)
- oneNav announces the first L5-direct GNSS receiver technology
- oneNav's Patented pureL5 GNSS Solution Proven in Silicon
- Abilis Systems Ships World's First Production DVB-T 90nm CMOS "Single-Die" Mobile Digital TV Receiver
- Broadcom Announces Complete Digital TV Receiver System Designed to Meet the NTIA's Digital-to-Analog TV Coupon Program
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |