MIPI UFS Controller, MIPI Unipro Controller and MIPI M-PHY IP Cores available in different Fabs and Nodes for all High-density Flash Storage applications in advanced SoCs
5th April 2022. – T2MIP, the global independent semiconductor IP Cores provider & Technology experts, is pleased to announce the immediate availability of its partner’s MIPI Alliance compliant MIPI UFS v3.1 Controller IP, MIPI UniPro v1.8 Controller IP and MIPI M-PHY v4.1 IP Cores in different process nodes for all UFS Device Solutions.
The MIPI M-PHY v4.1 IP Core is the latest MIPI Feature Storage IP Solution SerDes PHY of M-PHY v4.1 Specification, UniPro v1.8 Specification, and Universal Flash Storage (UFS) v3.0 Specification. It supports serial interface technology with high bandwidth capabilities also HS Gear4 rates up to 11.6Gbps, which is particularly developed for mobile applications to obtain low pin count combined with very good power efficiency. The MIPI M-PHY IP Core, compliant to the RMMI interface which allows UniPro controller and UFS Controller. It provides robust testability by Low operation current and low standby current Build-In-Self-Test (BIST), and receiver eye data monitoring and debugging function for embedded system at low-cost CP/FT
The MIPI UFS v3.6 Controller IP Core is a UFS synchronous serial interface, compatible with UFS version 3.6 specification. Through its UFS compatibility, it provides a simple interface to a wide range of low-cost devices. It supports Unified Memory Extension JESD220- 1A and Multiple User Data Partition with Enhanced User Data Area options for the added benefit of creating a Controlled UFS system. s Task management, Power management Operations and automatic/user tag generation make it a highly structured Core for complex solutions.
MIPI Unipro Controller IP Core is compliant with the latest MIPI UniPro v1.8 specification, provides the capability to control the UniPro link over a MIPI M-PHY link. MIPI UniPro is a high-performance, chip-to-chip, serial interconnect bus for mobile applications with maximum R/W Performance up to 2170MB/s. With the support of Asymmetric lanes (2 Lanes) and Gears the UniPro Controller IP Core combined with our UFS Controller IP Core and also our M-PHY IP, designers can easily integrate PHY and the controller with low risk and accelerate time-to market with our UFS IP Core solution.
The MIPI M- PHYIP core along with the MIPI UFS and UniPro Controller IP Core have been used in semiconductor industry’s Enterprise Computing, Storage area networks, Wireless and mobile devices, IoT, Embedded systems and other Consumer Electronics…
In addition MIPI M-PHY, UFS and Unipro IP Cores, T2M‘s broad silicon Interface IP Core Portfolio includes USB, HDMI, Display Port, DDR, MIPI (CSI, DSI, Soundwire, I3C), PCIe, 10/100/1000 Ethernet, V by One, programmable SerDes, SD/eMMCs and many more, available in major Fabs in process geometries as small as 7nm. They can also be ported to other foundries and leading-edge processes nodes on request.
Availability: These Semiconductor Interface IP Cores are available for immediate licensing either stand alone or with pre-integrated Controllers and PHYs. For more information on licensing options and pricing please drop a request / MailTo
About T2M: T2MIP is the global independent semiconductor technology experts, supplying complex semiconductor IP Cores, Software, KGD and disruptive technologies enabling accelerated development of your Wearables, IOT, Communications, Storage, Servers, Networking, TV, STB and Satellite SoCs. For more information, please visit: www.t-2-m.com
|
T2M Hot IP
- Bluetooth Dual Mode v5.4 / IEEE 15.4 PHY/RF IP in TSMC22nm ULP
- GNSS Ultra low power (GPS, Galileo, GLONASS, Beidou3, QZSS, IRNSS, SBAS) Digital ...
- USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+
- DVB-S2X WideBand Demodulator & Decoder IP (Silicon Proven)
- MIPI D-PHY Tx IP, Silicon Proven in TSMC 22ULP
Related News
- MIPI UFS 3.1, M-PHY 4.1, Unipro 1.8, ONFi 4.1 and many more IP Cores are available for immediate licensing for your advanced UFS Device Applications as a complete bundled solution
- MIPI CSI 3, DSI 2 Tx & Rx Advanced Controller & PHY IP Cores available in major Fabs & Nodes for SOC Designs for Imaging and Display Applications
- MIPI M-PHY 4.1 IP, UFS 3.1 Controller IP & Unipro 1.8 Controller IP Cores are available for instant licensing to support your total UFS applications
- MIPI UFS v3.1 Ctrl., MIPI UniPro v1.8 Ctrl. & MIPI M-PHY v4.1 IP Cores in 12nm & 28nm available for immediate licensing for high performance serial interface applications
- T2M-IP Unveils MIPI D-PHY v2.5 Tx and DSI Tx Controller v1.2: Silicon-Proven, Low-Power, Cost-Effective IP Core Solutions for Advanced SoCs
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |