Codasip appoints Japan EDA veteran
Semiconductor industry key to Japan’s growth
Munich, Germany – 6 April 2022 – Codasip the leading supplier of customizable processor IP, today announced that EDA industry veteran Takaaki Akashi will head up its newly established presence in Japan. Akashi has over 25 years of solid experience in design industry, having held senior customer-facing roles at Synopsys and Cadence. Akashi is already recruiting a team to support the anticipated growth in Japan and to support existing significant Codasip customers.
Akashi will report to Chief Revenue Officer, Brett Cline, who is actively building Codasip’s high-caliber global team. Codasip’s headcount is growing rapidly, from 90 at the end of 2021 to over 120 today – in a bid to resource the company’s design sites including the UK design center, opened in September.
Akashi successfully evangelized Verilog (IEEE std. 1364-1995) at Cadence at the start of the 1990s, and SystemVerilog (IEEE std. 1800-2005) at Synopsys in the early 2000s. Today, at Codasip, Akashi and his team use their extensive experience to support existing significant customers in Japan as well as developing new opportunities for Codasip’s RISC-V processor IP and Studio platform for custom processor designs.
Codasip’s Japan presence follows the announcement by the Japanese Government identifying the semiconductor industry as a strategic opportunity to boost Japan’s economic development. An initial $7bn investment will “make the nation a global provider of essential computer chips.” Codasip is committed to be part of Japan’s strategy to stimulate demand through the design and development of advanced logic semiconductors.
The global shortage of chip manufacturing and opportunities in fast growing sectors such as connected and autonomous vehicles, 5G communications, Artificial Intelligence, and IoT, gives Japanese chip designers and manufacturers, a real opportunity to thrive.
Codasip is well-positioned to help these Japanese design companies, large and small, enabling them to move quickly to seize opportunities, developing products using its ready-made processor IP, or custom tools for RISC-V processors. The unique approach of Design for Differentiation means Codasip helps companies move swiftly to maximize the market opportunities with domain specific processors which maximize performance based on both the end application and software environment.
The capabilities of Codasip’s Studio platform go far beyond a single architecture, but RISC-V in particular is seen as a key to rapid innovations. RISC-V International, the body behind the open architecture, has identified growth opportunities particularly for innovations in ‘AI, ML, the IoT, connected and autonomous cars, data centers, and beyond’.
Ron Black, “In addition to our significant customers in Japan, it was important in building a strong global team that we moved quickly in seizing the rapidly growing opportunities for RISC-V and domain specific processors”, Black continued, “It was important the team understand our proposition and have insights into our existing and potential customer needs. We are delighted to have Akashi with his extensive knowledge and experience as part of our team.”
Takaaki Akashi, added, “Having witnessed the success of Codasip, and the high-skill, high-performance value it brings to customers it was clearly a natural fit for Codasip’s Design for Differentiation, as I have discussed with our customers. The establishment of Codasip in Japan is incredibly timely and I am proud to be part of such a strong and growing global team to help build the company’s profile in Japan.”
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