CAMARILLO, Calif. - March 24, 2003 - Vitesse Semiconductor Corporation (Nasdaq: VTSS) and Xilinx, Inc. (Nasdaq: XLNX) today announced the successful completion of SPI-4.2 interoperability between the Vitesse Meigs-II 10Gbps Ethernet MAC and the Xilinx® Virtex®-II series FPGA-based SPI-4.2 core. This solution will be demonstrated for the industry during the first Physical and Link Layer (PLL) Interoperability exhibition at the 2003 Optical Fiber Communication Conference (OFC) in Atlanta, March 25-27, 2003. The Optical Internetworking Forum (OIF) is sponsoring the event in Booth #7620, Hall B.
The hardware interoperability of the OIF-compliant SPI-4.2 interface achieved by Vitesse and Xilinx will enable system designers to focus on system-level issues instead of board-level connectivity. This will streamline and accelerate the development of high-density Gigabit Ethernet (GbE) and 10 Gigabit Ethernet (10GbE) solutions in next-generation Enterprise and Metro platforms such as L2/3 Ethernet Switches, Edge Routers, and Ethernet-over-SONET/SDH applications.
"Vitesse is committed to demonstrating interoperability through standards-based testing to ensure seamless component level connectivity," said Ole Andersen, vice president and general manager for Vitesse's Ethernet Products Division. "Working with fellow OIF member Xilinx, a leading supplier of programmable logic solutions, Vitesse has met this commitment, thus increasing the customer's confidence and simplifying their PC board implementation."
"The interoperability demonstrated between Vitesse's new Meigs-II QUADSpeed MAC device and Xilinx' Virtex-II FPGA running the SPI-4.2 core at OFC 2003 is a powerful example of how the SPI-4.2 interface standard accelerates the development of fast, reliable data transport solutions for enterprise and metro access applications," said Mark Aaldering, senior director of the IP Solutions Division at Xilinx. "Vitesse and Xilinx are leading the way in proving real-world interconnect solutions that allow terabit equipment providers to deliver robust, successful end products."
Product Information
Meigs-II™, the industry's first QUADSpeed MAC™, combines ten triple-speed (10/100/1000 Mbps) ports and a single 10GbE port, along with the OIF-compliant SPI-4.2 System Interface, to form the industry's highest density 10Gbps MAC. Meigs-II can interface with a variety of physical layer copper devices using either the MII or GMII interfaces or it can be directly connected to fiber modules using the integrated GbE serializer/deserializer (SERDES) interfaces to enable high density, cost-efficient per port pricing for optical Ethernet applications. The integrated 10 Gigabit Attachment Unit Interface (XAUI) seamlessly connects to 10Gbps module Multi-Sources Agreements (MSA) such as XENPAK, X2, and XPAK as well as facilitating a solution for ultra-small form factor MSAs such as the XFP.
The SPI-4.2 LogiCORE™ solution is built around a pre-engineered, drop-in IP core that supports OC-192 10Gbps data rates and dynamic phase alignment and is supported on the latest Virtex-II and Virtex-II Pro FPGAs. The SPI4.2 core addresses the increasing demands of network Internet Protocol (IP) traffic by ensuring compliance with the OIF SPI-4 Phase 2 standard, also known as SPI-4.2. The SPI-4.2 connectivity solution from Xilinx is widely adopted as a powerful, flexible bridging solution used in Gb routers, terabit switches, optical cross connect switches, and a wide range of multi-service DWDM and SONET/SDH-based transmission system transport technologies to connect network processor, framers, and ASSPs. Based on the increasing focus on interoperability, Xilinx now provides an interoperability matrix to enable designers to research and explore the details of how leading networking components interoperate using Xilinx FPGAs as the bridging platform. The matrix can be found at: http://www.xilinx.com/company/reference_design/interop_solutions.htm. Complete information about the SPI-4.2 LogiCORE solution as well as information on all Xilinx LogiCORE™ products can be found at http://www.xilinx.com/connectivity.
OIF PLL Interoperability Demonstration
This demonstration will highlight dynamic N-way interoperability of the SPI-4.2 Implementation Agreement (IA) as well as the SFI-4.1 IA, SFI-5 IA, the tunable laser IA and the TFI-5 work in-progress among OIF member companies. OIF is a rapidly growing non-profit organization with 250+ member companies to date, including many of the world's leading carriers, component, and system vendors. The purpose of the OIF is to accelerate the deployment of interoperable, cost effective, and robust optical internetworks and their associated technologies. More information on the OIF and the interoperability demonstration can be found at www.oiforum.com.
About Vitesse
Vitesse Semiconductor is a leading designer and supplier of innovative, high-performance integrated circuits (ICs) and optical modules used in next-generation networking and optical communications equipment. The Company's products address the needs of Enterprise, Access, Metro, Core, and Optical Transport network equipment manufacturers who demand a robust combination of high-speed, high-service delivery and low-power dissipation in their products. In concert with its broad communications product portfolio, Vitesse also develops ICs for storage area networking and enclosure management.
About Xilinx
Xilinx, Inc. (NASDAQ: XLNX) is the worldwide leader of programmable logic solutions. Additional information about Xilinx is available at www.xilinx.com.
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