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Chiplets Get a Formal Standard with UCIe 1.0
Recent uptick in chiplet interest has led to concerns about lack of best practices
By Gary Hilson, EETimes (April 8, 2022)
The recently announced Universal Chiplet Interconnect Express (UCIe) 1.0 specification covers the die–to–die I/O physical layer, die–to–die protocols, and a software stack model leveraging PCI Express (PCIe) and Compute Express Link (CXL) industry standards.
It’s fair to say that UCIe is a long time coming. Chiplets aren’t new, but recent uptick in interest in the technology has raised concerns about the need for a formal standard and best practices.
UCIe has garnered a lot of interest in recent years because of its tried–and–true nature and its ability to help semiconductor companies solve common problems faced today. Chiplets offer an approach to semiconductor design and integration that hold the promise of speeding things up with Moore’s Law, which is now nearly six decades old. The pace of semiconductor manufacturing advancement has also been waning as of late.
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