Barry Paterson is the new Agile Analog CEO
Cambridge, UK -- May 31, 2022 -- Agile Analog™ has announced Barry Paterson as its new CEO. With a career covering Cadence, Dialog, Intel, Maxim and Wolfson, he has been at the forefront of mixed signal semiconductor design and development for 30 years.
“Agile Analog is at a key point in its growth to becoming a major player in the semiconductor industry,” said Paterson. “Our funding round of $19 million last year gave the company the resources to be able to re-architect our process agnostic technology from the ground up, and I’m looking forward to getting that technology into the hands of more analog designers as a result of our recruitment drive to increase our engineering headcount by over 50% this year.
“We truly have a disruptive technology that is changing analog design within the industry by enabling analog IP to be automatically generated rather than hand crafted every time.”
Peter Hutton, Agile Analog’s Chairman added, “The Board ran an extensive international search for the right CEO to be able to take Agile Analog from its success in building the platform to scale to more IP and more customers. I’m delighted that Barry has joined us to take the company forward. We couldn’t ask for a better combination of technical knowledge, commercial experience, strategic vision, operational expertise and passion to get our technology in the hands of the wider semiconductor industry.”
Agile Analog has a unique way to automatically generate analog IP to exactly meet the customer’s specifications and process technology. Called Composa™, it uses tried and tested analog IP circuits that are in the company’s Composa library. Effectively, the design-once-and-re-use-many-times model of digital IP now applies to analog IP for the first time. As the analog IP circuits in the Composa library have been extensively tested and used in previous designs, and are fully validated every time they are generated, this gives a similar level of reassurance to the digital IP world’s ‘silicon-proven’.
Importantly for the customer, the Composa automated approach creates bespoke and verified analog IP solutions reducing time to market and increasing quality. It also means that Composa can simply regenerate the analog IP solution using the PDK for a customer on a different process technology when needed, for example when switching to a different foundry or shrinking the chip to suit a smaller node. Effectively, the company has created the world’s first, automatically generated, process-agnostic analog IP.
The demand for analog technology is growing every year, and has been estimated to be valued at $83.2 billion in 2022 according to IC Insights’ 2022 McClean Report.
Barry Paterson, Agile Analog's CEO
About Agile Analog Ltd.
Analog IP needs to be different for each design. That is why Agile Analog™ has made a new way of doing things, conceived by some of the best minds in the industry. We provide a wide range of analog IP that is customised to your needs quickly, to a higher quality, and on any semiconductor process. Contact us at www.agileanalog.com to find out more.
|
Related News
- RISC-V startup recruits former Agile Analog CEO Ramsdale
- Agile Analog welcomes Sir Hossein Yassaie, former Imagination Technologies Founder and CEO, to its Board
- Agile Analog announces MoU to support new Southern Taiwan IC Design Industry
- Agile Analog delivers customizable IP on GlobalFoundries' FinFet and FDX processes
- Agile Analog delivers first full always-on IP subsystem
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |