BSC and Intel announce a joint laboratory for the development of future zettascale supercomputers
The Spanish Government and Intel plan to invest up to €400 million over 10 years to setup a new joint laboratory.
June 1, 2022 -- The Barcelona Supercomputing Center - Centro Nacional de Supercomputación (BSC-CNS) and the US company Intel announced this afternoon at ISC in Hamburg, Germany on plans to jointly set up a pioneering laboratory to develop a new generation of supercomputers that will break the zettascale barrier. For this purpose, the joint laboratory will design microprocessors or chips with technology based on open-source RISC-V hardware. This joint laboratory will help Europe to become autonomous in these types of chips which can be used worldwide in the design of autonomous cars or devices for artificial intelligence applications.
The announcement was made at Europe's largest high-performance computing (HPC) conference, which is currently taking place in Hamburg, Germany.
This joint laboratory will receive up to €400 million in investment over 10 years. These funds will come from Intel and the Spanish Government through PERTE Chip as part of the Recovery, Transformation and Resilience Plan, approved by the Cabinet last week.
“We are very pleased that Intel has chosen BSC to create a research lab together that will be a world leader in chip design. One of the objectives will be for future European supercomputers, such as MareNostrum 6 within 5 years, and many others worldwide, to incorporate technology developed in this lab. In addition, the lab will help create a hub for new companies and jobs,” said Mateo Valero, director of BSC-CNS.
”High-performance computing is the key to solving the world’s most challenging problems and we at Intel have an ambitious goal to sprint to zettascale era for HPC. Barcelona Supercomputing Center shares our vision for this goal, with equal emphasis on sustainability and an open approach. We are excited to partner with them to embark on this journey,” said Jeff McVeigh, vice president and general manager of the Super Compute Group at Intel.
Innovative technology that will create a new era in supercomputing
Microprocessors or chips are the heart of all electronic devices with computational capacity, as they contain the repertoire of basic instructions for their operation. These devices are strategic assets for key industrial value chains and are used in a vast range of sectors, from cellphones to cars, including hospital equipment and supercomputers.
Europe is dependent on these chips, which are mostly designed and marketed by American companies and manufactured in countries such as Taiwan and South Korea. The objective of the joint laboratory announced today will be the design of very high performance chips to be used worldwide supercomputers, autonomous cars and devices for artificial intelligence applications.
The conception of open-source RISC-V architecture began in 2010 at UC Berkeley due to the need to reduce the enormous and growing complexity of microprocessor instruction repertoires and to limit heavy dependence on third countries. Since then, RISC-V has led the way worldwide in the democratization of hardware, just as the open-source Linux operating system did for software.
The new processors designed by the joint BSC-CNS laboratory and Intel will drive the development of new technologies such as the zettascale computers of the future. These supercomputers will break the barrier of 1021 operations per second, 1000 times faster than today's most powerful supercomputers.
As we enter the era of exascale supercomputers (1019 operations per second), the combination of accelerated high-performance computing, artificial intelligence and deep learning are driving exponential data growth and the need for an unprecedented pace of innovation and research.
Zettascale supercomputers will thus make it possible to solve problems that are now unthinkable or difficult to tackle. For example, they will be key to the creation of digital twins of the Earth that simulate climate models with high accuracy to explore the impact of global warming; digital twins of the human body itself, which will help to prevent and treat diseases such as cancer; knowing whether the models of the universe we currently use are correct; and providing answers to fundamental questions such as whether the universe will contract or expand.
A technological innovation hub that will attract new investment and jobs
This joint laboratory is expected to create 300 new highly qualified jobs and will be an innovation hub that will attract new international investment. It will also aid the creation of a robust system for the future of supercomputing in Europe.
The laboratory will be located in Campus Nord at the Polytechnic University of Catalonia, where BSC-CNS’s facilities are also placed.
BSC-CNS's collaboration with Intel began in 2011. Since then, the two organizations have worked hand in hand to accelerate research and development in high-performance computing.
|
Related News
- Brazil and Europe sign innovative project with RISC-V technology for HPC
- BSC presents Sargantana, the new generation of the first open-source chips designed in Spain
- BSC, Codeplay and SiFive help accelerate applications on RISC-V thanks to V-extension support in LLVM
- BSC develops four open-source hardware components based on RISC-V, contributing to open, reliable and high-performance safety-critical systems for industry
- BSC executes, for the first time, big encrypted neural networks using Intel Optane Persistent Memory and Intel Xeon Scalable Processors
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models
Most Popular
E-mail This Article | Printer-Friendly Page |