Credo Launches Comprehensive Family of 112G PAM4 SerDes IP for TSMC N5 and N4 Process Technologies
Unique programmable power versus channel reach performance technology targets high-performance compute, switching, AI, machine learning, security, and optical
SAN JOSE, Calif.-- August 17, 2022 -- Credo Technology Group Holding Ltd (NASDAQ: CRDO) today introduced its 112G PAM4 SerDes Intellectual Property (IP) family on TSMC’s industry-leading N5 and N4 process technologies. The comprehensive family supports a wide range of demands including long reach plus (LR+), long reach (LR), medium reach (MR), extreme short reach plus (XSR+), and extreme short reach (XSR), – required by applications including compute, switching, AI, machine learning, security, and optical deployments.
Jim Bartenslager, Associate Vice President of Business Development for IP Products commented, “Credo’s advanced mixed signal and DSP 112G PAM4 SerDes architectures were developed and proven on the TSMC 12nm process technology for Credo’s complete family of connectivity solutions for both copper and optical applications. We have ported our unique, purpose-built SerDes technology to the TSMC N5 and N4 processes to allow our partners and customers to seamlessly integrate our industry leading 112G PAM4 IP into larger scale monolithic and multi-chip-module ASICs.”
“Our latest collaboration with Credo makes it easy for customers to benefit from the significant power and performance improvements of TSMC’s advanced N5 and N4 processes,” said Dan Kochpatcharin, Director of the Design Infrastructure Management Division at TSMC. “We look forward to working closely with Credo to address the design challenges for rapid advancement of applications in compute, switching, AI, and machine learning.”
The company’s unique software programmable innovations allow architects to optimize power and performance on a lane-by-lane basis, unleashing new levels of system level performance. These new 112G PAM4 SerDes IP were designed to meet the ever-growing data needs of high-speed, data-intensive applications and early access design customers can engage immediately by contacting the Credo sales team. Production, silicon validation, design kit of these 112G SerDes for multiple TSMC processes from N16 to N4 are available on TSMC-Online.
Credo's SerDes technology enables silicon solution providers and OEMs to manufacture custom chip solutions which address new market opportunities, while delivering on critical performance and low-power system level requirements. All Credo IP solutions are supported with evaluation boards, simulation models, characterization reports, reliability reports, design libraries and a complete set of supporting documentation. Customers interested in this new IP should contact sales@credosemi.com.
About Credo
Our mission is to deliver high-speed solutions to break bandwidth barriers on every wired connection in the data infrastructure market. Credo is an innovator in providing secure, high-speed connectivity solutions that deliver improved power and cost efficiency as data rates and corresponding bandwidth requirements increase exponentially throughout the data infrastructure market. Our innovations ease system bandwidth bottlenecks while simultaneously improving on power, security, and reliability. Our connectivity solutions are optimized for optical and electrical Ethernet applications, including the emerging 100G (or Gigabits per second), 200G, 400G and 800G port markets. Our products are based on our proprietary Serializer/Deserializer (SerDes) and Digital Signal Processor (DSP) technologies. Our product families include integrated circuits (ICs), Active Electrical Cables (AECs) and SerDes Chiplets. Our intellectual property (IP) solutions consist primarily of SerDes IP licensing.
For more information, please visit https://www.credosemi.com.
|
Credo Semiconductor Hot IP
Related News
- Credo Launches 112G PAM4 SerDes IP for TSMC N3 Process Technology
- Credo Demonstrates 112G PAM4 and 56G PAM4 SerDes IP Solutions at TSMC 2018 Technology Symposium
- Credo Demonstrates Single-Lane 112G and 56G PAM4 SerDes IP Solutions at TSMC 2017 OIP Ecosystem Forum
- Credo Demonstrates Single-Lane 112G and 56G PAM-4 SerDes IP at TSMC OIP Forum
- Credo 16-nm 28G and 56G PAM-4 SerDes Now Available on TSMC FinFET Compact Process
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |