Zynq® UltraScale+™ MPSoC FPGA: REFLEX CES adds a new FPGA version to its Zeus Zynq® UltraScale+™ MPSoC System-on-module
Zynq® UltraScale+™ MPSoC FPGA: REFLEX CES adds a new FPGA version to its Zeus Zynq® UltraScale+™ MPSoC System-on-module.
PARIS -- October 27, 2022 -- REFLEX CES, a leading European-based provider of custom embedded systems and High-End FPGA COTS boards, has added a new FPGA version to the already existing version of the Zeus Zynq® UltraScale+™ MPSoC System-on-Module.
The Zeus Zynq® UltraScale+™ MPSoC is a System-on-Module, initially based on the Xilinx® ZU11EG Zynq® UltraScale+™ MPSoC FPGA.
A new version of this module, based on the Xilinx® ZU19EG Zynq® UltraScale+™ MPSoC FPGA, will be released next year.
The Zynq® Ultrascale+™ MPsoC FPGA has been chosen for its ever-unmatched performances, as well as for its lower system power architecture.
The System-on-Module offers a PCIe Gen2 x4 Root Complex, a PCIe Gen3 x16 End Point, but also a Quad-Core ARM Cortex-A53. With a total of 304 SE IOs (96 LVDS), 16 GTY @25.78Gbps (Top side), 32 GTH @12.5Gbps (Bot side) and 3x DDR4 banks (16GByte Total), this module has been developed to perfectly fit high-performance needs.
The module is dedicated for Software Defined Radio, Radar Systems, Electronic Warfare and High Precision Measurement applications, but can be adapted to a lot more markets.
The ZU19EG version offers 1.1MLC programmable Logic, twice as the ZU11 version which is offering 650KLC. This allows to run more complex and powerful algorithms and calculations, for example for Radar applications.
The total Block RAM is 34.6MB, the UltraRAM 36.0Mb. This PFGA also offers 1968 DSP Slices.
The Zeus Zynq® UltraScale+™ module is fully compatible with the Carrier Board : Zeus Zynq® UltraScale+™ board.
The Carrier Board of the Zeus Zynq® UltraScale+™ MPSoC System-on-Module is an evaluation board with Dual FMC+ connectors, and has been designed to be complementary to the SoM.
The system-on-module ZU19 version will be available on Q2 2023, please contact sales@reflexces.com for availability and pricing.
Ordering information:
- Zeus Indus ZU11EG: RXCZUP11EGPF42-SOM01I
- Zeus Indus ZU19EG: RXCZUP19EGPF42-SOM01I
About REFLEX CES
Recognized for its expertise in high-speed applications, analog and hardened systems, REFLEX CES has become a leading partner with major industrial companies.
REFLEX CES simplifies the adoption of FPGA technology with its leadingedge FPGA-based custom embedded and complex systems. REFLEX CES FPGA network platforms enable better flexibility and ease of programming, offering a faster and most powerful board, and reducing the customers’ technology risks and time to market.
For more information, visit https://reflexces.com
|
Reflex CES Hot IP
Related News
- Subaru Selects Xilinx to Power New-Generation EyeSight System
- Xilinx Powers Baidu's Production-Ready ACU-Advanced Platform for Automated Valet Parking
- Xilinx Announces the World's Highest Performance Adaptive Devices for Advanced ADAS and AD Applications
- Xilinx Addresses Rigorous Security Demands at Fifth Annual Working Group for Broad Range of Applications
- Xilinx Extends Functional Safety into AI-class Devices
Breaking News
- Cadence to Acquire Secure-IC, a Leader in Embedded Security IP
- Blue Cheetah Tapes Out Its High-Performance Chiplet Interconnect IP on Samsung Foundry SF4X
- Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
- YorChip announces patent-pending Universal PHY for Open Chiplets
- PQShield announces participation in NEDO program to implement post-quantum cryptography across Japan
Most Popular
- Qualitas Semiconductor Signs IP Licensing Agreement with Edge AI Leader Ambarella
- BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura's Cyberthreat Intelligence Tool
- Altera Launches New Partner Program to Accelerate FPGA Solutions Development
- Alchip Opens 3DIC ASIC Design Services
- Electronic System Design Industry Posts $5.1 Billion in Revenue in Q3 2024, ESD Alliance Reports
E-mail This Article | Printer-Friendly Page |