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Eliyan eliminates silicon interposer to advance D2D chiplet connect for HPC
Nitin Dahad, embedded.com (November 25, 2022)
Eliyan’s chiplet interconnect technology enables connection of homogeneous & heterogenous architectures on a standard organic chip substrate.
Eliyan, a startup co-founded in 2021 by three experienced networking, connectivity, chip architecture and packaging serial entrepreneurs, recently announced details of its chiplet connectivity technology that claims to eliminate the need for advanced packaging like silicon interposers, with subsequent gains in bandwidth, power and latency for die-to-die connectivity in high-performance computing (HPC) applications.
The details were revealed as the company announced two milestones in the commercialization of its technology for multi-die chiplet integration – the successful tapeout of its technology on a TSMC 5nm process (with first silicon expected in the first quarter of 2023), and the completion of a series A $40 million funding round which includes strategic investment form Intel Capital and Micron Ventures.
The company said its design confirms Eliyan’s ability to achieve twice the bandwidth at less than half the power consumption of current interconnect methods and does so using a standard system-in-package (SIP) manufacturing and packaging process. The ability to implement chiplet-based systems in organic packages enables the creation of larger and higher performance solutions at considerably lower power and cost of materials. These factors provide major gains in sustainability.
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