Virtual Silicon Introduces Industry's First Low-Power 0.13-Micron Product Line
Virtual Silicon Introduces Industry's First Low-Power 0.13-Micron Product Line
Virtual Silicon's innovative low power IP can reduce static current drain by as much as a factor of three over standard 0.13-micron IP. Such performance can greatly extend the battery life of portable devices. Virtual Silicon's Fusion IP is ideally suited for a wide range of battery-powered applications including cell phones, PDA's, notebook computers and consumer electronics.
Next Generation Applications
Among the other targeted applications for this IP include low power products that require localized performance optimization like GSM, DEC and third-generation (3G) wireless applications such as W-CDMA. Conversely, the same approach may be used for high-speed products that require localized power reductions like ADSL, VDSL or Hyperlan applications.
The SoC featured in low power mobile applications, such as the second-generation cell phones widely deployed today, use a single transistor optimized for low power consumption, which means speed is sacrificed over power consumption. The next generation of mobile applications, however, will require performance levels at several billion operations per second while simultaneously demanding low power consumption to enable multi-hour voice and data transmission between battery recharges.
Fusion enables these applications to utilize the high-speed transistor for performance-intensive digital signal processing tasks such as web browsing, while functions not requiring high processor speed (such as memory storage, control logic, and accessories such as MP3 players, GPS and Bluetooth extensions) can be relegated to the low power transistor, all on the same baseband integrated circuit.
``This innovation of combining high-speed and low-power logic transistors into a single chip design offers IC designers, and specifically handheld portable electronics, an additional degree of freedom to meet the demanding specifications of next-generation communications and portable consumer products,'' said Ed Wan, worldwide field engineering for UMC. ``We believe those designing for 3G communication devices will welcome the tremendous benefits that Virtual Silicon's SoC IP targeted to the Fusion process has to offer, and are confident that this total solution will become widely accepted as the standard for many advanced applications.''
``SoC designers have tremendous challenges in achieving timing and power closure in their battery powered designs,'' said John Ford, vice president of marketing for Virtual Silicon. ``Virtual Silicon's low-power 0.13-micron IP on UMC's Fusion process gives designers the best of both worlds -- high performance and longer batter life.''
Availability and Pricing
The new products include two standard-cell libraries (1.2 and 0.9 volt), 3 sets of I/Os (35 and 70-micron pitch at 3.3 volt and 70-micron pitch at 1.8 volt), 3 memory compilers (single port SRAM, dual port SRAM and ROM), and a programmable PLL compiler. Design kits for the entire family of IP are available now. The 1.2 volt standard cells and 3.3 volt I/Os are available from Virtual Silicon at no charge courtesy of UMC. Other IP may be licensed directly from Virtual Silicon for fees ranging from $200K to $500K.
WorldLogic SoC Platform
UMC's WorldLogic technology, generally considered to be the industry's most advanced, was introduced into production last year. The WorldLogic process uses all copper interconnects (up to 8 layers) and is the only technology in the foundry industry with a true ``low-k'' dielectric solution (k=2.7) at 0.13-micron, while the rest of the industry is using conventional oxide materials with k values ranging from 3.5-4.0. Low k is important at 0.13-micron to minimize wiring delays associated with parasitic capacitance. This advanced WorldLogic copper/low-k interconnect technology, coupled with transistor switching delays below 10 picoseconds, enables microprocessor clock frequencies that exceed 2 Gigahertz. Furthermore, packing densities of 20 million logic gates per square centimeter of silicon, along with the smallest embedded SRAM bit cell in the foundry industry (2.28 micron2), provide for the highest functionality per unit area ever offered in the semiconductor industry.
WorldLogic is a comprehensive platform in that it offers multiple choices for transistors, SoC IP and architecture. There are four logic transistor choices; MPU, standard high-speed, low-leakage and very low leakage. The unique ``fusion'' design option combines both high-speed and low-leakage transistors onto a single IC.
About Virtual Silicon Technology
Virtual Silicon is a leading supplier of semiconductor intellectual property to manufacturers and designers of complex systems-on-chip (SoC). Headquartered in Sunnyvale, Calif., the company provides process-specific embedded components that serve the wireless, networking, graphics, communication and computing markets. Customers include leading fabless semiconductor companies, integrated semiconductor manufacturers, foundries, and SoC developers who demand leading edge technology for their semiconductor innovations. For more information, call 408/548-2700 or visit Virtual Silicon online at www.virtual-silicon.com.
Note to Editors: eSi-Route, eSi-Pad, eSi-RAM, eSi-ROM, eSi-PLL, The Heart of Great Silicon, Silicon Ready, and Virtual Silicon are trademarks of Virtual Silicon Technology, Inc. Fusion is the trademark of UMC.
Contact:
Virtual Silicon Technology, Sunnyvale
John Ford, 408/548-2737
johnf@virtual-silicon.com
or
VitalCom Marketing and PR
Karen Tyrrell, 650/637-8212 ext. 204
karen@vitalcompr.com
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