Latest aiWare4+ automotive NPU brings enhanced programmability, flexibility and scalability while retaining highest efficiency
Budapest, Hungary, 14th December 2022 – aiMotive, one of the world’s leading suppliers of scalable modular automated driving technologies, today announced the latest release of its award-winning aiWare automotive NPU hardware IP. aiWare4+ builds on the success of aiWare4 in production automotive SoCs, such as Nextchip’s Apache5 and Apach6, by refining the hardware architecture and significantly upgrading the software SDK. Together these enable higher efficiency execution of a far broader range of workloads, such as transformer networks and other emerging AI network topologies. Support for FP8, as well as INT8 computation and dedicated sparsity hardware support, are also included in aiWare4+.
The unique “data-first” scalable hardware architecture combines concepts such as near-memory execution, massively parallel on-chip I/O, hierarchical hardware tiling, and wavefront processing to deliver the highest possible PPA.
Upgraded capabilities for aiWare4+ include:
- Upgraded Programmability: significant enhancements to the aiWare hardware architecture and SDK portfolio of tools enable users to gain full access to every part of aiWare’s internal execution pipeline without compromising the high-level AI-centric approach that makes tools such as the highly interactive aiWare Studio so popular with both research and production engineers
- Full FP8 Support: with aiWare4+, full support has been added for FP8 in addition to INT8 quantization for workload execution
- Broader Network Support: SDK upgrades enable users to deliver higher performance for not only CNNs but the latest emerging industry trends, such as transformer networks, occupancy networks and LSTMs. aiWare4+ users will also benefit from hardware enhancements delivering significant performance and efficiency boosts for workloads such as transformer networks
- Enhanced Sparsity Support: aiWare4+ hardware upgrades mean any weight sparsity results in minimized NPU power consumption on a per-clock basis, ensuring optimized power consumption for the widest possible range of workloads
- Improved Scalability: aiWare4+ is designed to scale from 10 TOPS up to 1000+ TOPS using a multi-core architecture to increase throughput while retaining high efficiency (subject to external memory bandwidth constraints). Furthermore, aiWare4+ brings interleaved multi-tasking that optimizes performance and efficiency with multiple workloads.
aiMotive team of AI researchers constantly track the latest developments in the automotive AI industry and relentlessly benchmark and compare our methodologies to the best in the industry. aiWare4+ continues to deliver the automotive industry’s highest NPU efficiency of up to 98% for a wide range of AI workloads, enabling superior performance using less silicon and less power.
“When we delivered aiWare4, we knew our highly customized hardware architecture enabled us to deliver superior efficiency and PPA compared to any other automotive inference NPU on the market,” says Mustafa Ali, product director, aiWare for aiMotive. “However, while acknowledging our CNN efficiency leadership, some of our customers were concerned about aiWare’s programmability compared to more conventional architectures such as DSP- or GPU-based NPUs. These latest aiWare4+ and aiWare SDK upgrades ensure that our customers can program aiWare for a broad range of AI workloads, achieving future-proof flexibility comparable to some of the best-known SoCs and DSP-based NPUs, without sacrificing our industry-leading NPU efficiency”.
aiMotive will be shipping aiWare4+ RTL to lead customers starting Q2 2023 while the SDK provides early support for the majority of the new features today, with the availability of production quality release in 2023.
Notes
Note 1: PPA: Power, Performance and Area
Note 2: See aiWare3 benchmarks on Nextchip’s Apache5 SoC
For more details about aiWare4+, click here.
|
AImotive Hot IP
Related News
- AImotive launches aiWare4, featuring advanced wavefront processing, upgraded safety and low-power features
- aiMotive achieves an industry first milestone with ISO26262 ASIL B certification for aiWare4 NPU IP
- aiMotive ships first aiWare4 NPU production RTL
- Nextchip licenses aiMotive's aiWare4 for their Apache6 automotive domain processor
- Latest NPU adds to Arm's AI Platform performance, applicability, and efficiency
Breaking News
- Logic Design Solutions launches Gen4 NVMe host IP
- ULYSS1, Microcontroller (MCU) for Automotive market, designed by Cortus is available
- M31 is partnering with Taiwan Cooperative Bank to launch an Employee Stock Ownership Trust to strengthen talent retention
- Sondrel announces CEO transition to lead next phase of growth
- JEDEC Publishes LPDDR5 CAMM2 Connector Performance Standard
Most Popular
- Arm's power play will backfire
- Alphawave Semi Selected for AI Innovation Research Grant from UK Government's Advanced Research + Invention Agency
- Secure-IC obtains the first worldwide CAVP Certification of Post-Quantum Cryptography algorithms, tested by SERMA Safety & Security
- Weebit Nano continuing to make progress with potential customers and qualifying its technology Moving closer to finalisation of licensing agreements Q1 FY25 Quarterly Activities Report
- PUFsecurity Collaborate with Arm on PSA Certified RoT Component Level 3 Certification for its Crypto Coprocessor to Provide Robust Security Subsystem Essential for the AIoT era
E-mail This Article | Printer-Friendly Page |