SNIA Spec Gets Data Moving in CXL Environment
SDXI addresses limitations of proprietary Direct Memory Access devices.
By Gary Hilson, EETimes (January 5, 2023)
The Compute Express Link (CXL) spec is arguably one of the fastest-maturing interfaces in the semiconductor industry. Its widespread buy-in has meant many vendors have designed products to build out the ecosystem, with the Storage Networking Industry Association (SNIA) being the latest to put its hat in the ring to help further improve data movement.
On Nov. 28, SNIA introduced the Smart Data Accelerator Interface (SDXI) specification. Similar to CXL, the SDXI spec prioritizes efficient data movement; specifically, SDXI is a standard for a memory-to-memory data mover and acceleration interface. The genesis of the specification dates to September 2020, when a SNIA technical working group (TWG) set out to realize the concept of a Direct Memory Access (DMA) data-mover device and addressed common limitations.
The role of a DMA is to offload software-based copy loops to free up CPU execution cycles. Although the concept is well known, DMA adoption is often limited to specific privileged software and I/O use cases employing device-specific interfaces that aren’t forward-compatible. These limitations mean user-mode application usage is difficult in a non-virtualized environment and almost impossible in a multi-tenant virtualized environment.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
Related News
Breaking News
- JEDEC® and Industry Leaders Collaborate to Release JESD270-4 HBM4 Standard: Advancing Bandwidth, Efficiency, and Capacity for AI and HPC
- BrainChip Gives the Edge to Search and Rescue Operations
- ASML targeted in latest round of US tariffs
- Andes Technology Celebrates 20 Years with New Logo and Headquarters Expansion
- Creonic Unveils Bold Rebrand to Drive Innovation in Communication Technologies
Most Popular
- Cadence to Acquire Arm Artisan Foundation IP Business
- AMD Achieves First TSMC N2 Product Silicon Milestone
- Why Do Hyperscalers Design Their Own CPUs?
- Siemens to accelerate customer time to market with advanced silicon IP through new Alphawave Semi partnership
- New TSN-MACsec IP core for secure data transmission in 5G/6G communication networks