Certus Semiconductor releases ESD library in GlobalFoundries 12nm Finfet process
January 13, 2023 -- Certus is pleased to announce the release of our ESD library in GlobalFoundries 12nm Finfet process. It offers a wide range of generic voltage solutions: 0.8V, 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V for power domains and I/Os. The library provides ESD solutions from 500V to >8kV HBM; 3A to 12A CDM options targeting 250V to 750V CDM qualifications. Features also include low capacitance RF and SerDes ESD protection: generic <120fF / <70fF solutions for 2kV HBM / 1kV HBM, with optimized <40fF solutions for 1kV HBM. The RF ESD solutions include high linearity for large signal swings and ultra-low leakage.
This ESD library offers complete strategies for a wide range of Flip-Chip, Chiplet, and 2.5D/3D architectures. With its small power clamp footprints of 38x43um for 0.8V and 44x41um for <1.8V, it reduces the cost per wafer. There is the capability to support >5V ESD protection as well. The library is silicon proven and is also tested for radiation-hardened environments, targeting aerospace as well as automotive and industrial applications.
Feel free to reach out to a Certus representative for more information!
|
Certus Semiconductor Hot IP
Related News
- Certus Semiconductor releases I/O library in TowerJazz's 65nm process
- Arasan announces the immediate availability of its MIPI D-PHY IP as Tx Only or Rx Only for the GlobalFoundries 12nm FinFET process node
- Arasan announces the immediate availability of its ultra-low power MIPI D-PHY IP for the GlobalFoundries 12nm FinFET process node
- Brite Semiconductor Releases ONFI 4.2 IO and Physical Layer IP based on SMIC 14nm FinFET Process
- Sofics Releases Analog IO's and ESD protection clamps for Advanced Applications using TSMC 7nm FinFET process
Breaking News
- Cadence to Acquire Secure-IC, a Leader in Embedded Security IP
- Blue Cheetah Tapes Out Its High-Performance Chiplet Interconnect IP on Samsung Foundry SF4X
- Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
- YorChip announces patent-pending Universal PHY for Open Chiplets
- PQShield announces participation in NEDO program to implement post-quantum cryptography across Japan
Most Popular
- Qualitas Semiconductor Signs IP Licensing Agreement with Edge AI Leader Ambarella
- BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura's Cyberthreat Intelligence Tool
- Altera Launches New Partner Program to Accelerate FPGA Solutions Development
- Alchip Opens 3DIC ASIC Design Services
- Electronic System Design Industry Posts $5.1 Billion in Revenue in Q3 2024, ESD Alliance Reports
E-mail This Article | Printer-Friendly Page |