Sonics Grants Toshiba Corporate-Wide License to Use Sonics Smart Interconnect IP in Toshiba SOCs

Mountain View, CA - 2003/04/21 - Sonics, Inc., a leading supplier of SOC (system-on-chip) interconnect IP solutions, announced today that Toshiba Corporation and Sonics have entered into a corporate-wide contract that enables Toshiba to use Sonics SMART Interconnect IP as an interconnect technology in Toshiba SOCs. The agreement enables all Toshiba business units, wholly owned subsidiaries and Toshiba customers to integrate Sonics' SiliconBackplane™ MicroNetwork IP and MemMax™ Memory Scheduler IP into their semiconductor products. Sonics IP solutions speed SOC development while improving performance, lowering development cost, reducing design time, and improving design reusability.

"Toshiba, an innovative global market leader, possesses one of the world's most advanced semiconductor process manufacturing technologies and we are excited by the challenge of establishing Sonics IP as their standard SOC interconnect technology," said Grant Pierce, president and CEO of Sonics, Inc. "Collaborating with Toshiba gives us the opportunity to work closely with their advanced SOC design teams as they deploy ever more complex IP blocks using advanced 90-nanometer and even 65-nanometer semiconductor process technologies. Working with Toshiba to meet their goal of delivering advanced semiconductor products to the market faster while saving time and money and increasing reusability will help us refine our IP products and tools. This collaboration is a key part of our business strategy of working closely with market leaders to achieve widespread market penetration and acceptance."

"Toshiba is committed to maintaining our top-three position in the global semiconductor market through multiple strategies that include expanding our system on silicon solution businesses, alliances with strategic partners, new product development and cultivation of new markets," said Dr. Susumu Kohyama, Corporate Senior Vice President, Toshiba Corporation. "This agreement will enable us to develop advanced next-generation SOCs quickly and will promote the reusability of IP across multiple design teams and even business divisions. As we move from our market-leading 90-nanometer production capabilities to next generation 65-nanometer process technologies, Sonics IP will help us develop feature-rich, high-volume SOCs that will fuel future market growth."

Sonics SMART interconnect IP products included in the agreement are the SiliconBackplane™ MicroNetwork IP that connects complex IP blocks such as processors, DSP engines, MPEG encoder/decoders, DMA engines or packet processors to other on-chip resources and the MemMax™ Memory Scheduler IP that optimizes memory access to off-chip memory resources. SiliconBackplane reduces system complexity by enabling individual IP blocks to operate independently while utilizing the SiliconBackplane to connect efficiently to other on-chip IP blocks. It improves system throughput, reduces development time, improves performance, and reduces risk. In addition, SiliconBackplane provides an architecture that promotes rapid redesign and development of new SOC devices using proven, previously integrated blocks.

The Sonics MemMax Memory Scheduler IP manages data traffic flowing between multiple on-chip IP cores and an off-chip DRAM system. It uses patent pending technology to examine the patterns of access to the DRAM and re-order requests to dramatically improve access to the DRAM system. It also maintains quality of service (QoS) requirements for each IP block that is accessing the offchip DRAM. Memory blocks traditionally used in each IP core to buffer data as a means of overcoming the lack of QoS capabilities can be consolidated within MemMax, reducing memory block size and increasing overall efficiency. As a result, MemMax improves DRAM utilization while reducing SOC die size.

Sonics is member of the Steering Committee of the Open Core Protocol International Partnership (OCP-IP) and all Sonics IP is OCP-compliant. The OCP-IP organization promotes a complete socket standard to ensure rapid creation and integration of interoperable intellectual property cores. Sonics has committed that all products based on its architecture will be fully OCP-compliant.

About Sonics, Inc.
Sonics, Inc. is a premier developer of intelligent semiconductor intellectual property (IP) solutions that dramatically accelerate complex system-on-chip (SOC) designs while minimizing risk. The Sonics Methodology and Architecture for Rapid Time-to-market (SMART) initiative is a comprehensive collection of products, services and partnerships to ensure customer success when utilizing Sonics SMART interconnect IP. SMART users can develop devices with higher functionality, lower power consumption and lower cost while achieving greater SOC complexity faster. Major semiconductor and systems companies have embraced Sonics SMART products for SOC applications in the communications, networking and multimedia markets, often reporting better than six-month design time savings with reduced design and manufacturing risks. Sonics is a privately held company backed by Investar Capital, Smart Technology Ventures, Tl Ventures, Easton Hunt Capital, JAFCO Ventures,and H&Q Asia-Pacific. For more information, see www.sonicsinc.com.

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