OPENEDGES Announces LPDDR5X/5/4x/4 PHY Tapeout at 7nm process node
Seoul, South Korea -- March 6, 2023 --- The leading memory subsystem IP provider, OPENEDGES Technology, Inc. (OPENEDGES), today unveiled the tape out of the world’s first 7nm LPDDR PHY IP supporting LPDDR5x/5/4x/4 standards with a maximum data rate of 8533Mbps, providing more detailed information about the tape out.
According to JEDEC (JESD209-5B), LPDDR5x is the next-generation high-performance low-power DRAM, exceeding LPDDR5’s memory speed of 6400Mbps with a data rate up to 8533Mbps. The PHY interface is compliant with the latest DFI 5.1 specification and enables end-users to select DRAM that meets their product specifications while maintaining backward compatibility with previous LPDDR standards. In addition to improving memory bandwidth for edge computing, power consumption can be reduced with dynamic voltage and frequency scaling (DVFS) for less memory-intensive operating scenarios.
Related |
LPDDR5X/5/4X/4 combo PHY at 7nm |
The testchip is complete with the LPDDR5X/5/4x/4 memory controller and PHY IPs integrated together, providing a proven memory subsystem integration solution. To OPENEDGES’ customers, the Orbit™ memory subsystem’s fully integrated OMC™ and OPHY™ can accelerate their overall SoC design schedule with expected performance and power.
"The tape out of the 7nm LPDDR5X memory sub-system testchip marks the completion of another important milestone for us, building on the successes of our 14nm and 12nm LPDDR5 PHY designs. And with the completion of the design, we are ready for customer engagement with our LPDDR5X technology," said Tony Nguyen, Principal Engineer at The Six Semiconductor of OPENEDGES Technology and Design Lead for the LPDDR5X program.
"We architected our LPDDR PHY to be a highly configurable and flexible product, along with backwards compatibility to previous generations of LPDDR DRAM. This translates to our customers' flexibility in product definition, where a single PHY integration can accommodate products of different prices points." said Mihail Sararoiu, Fellow and DDR PHY architect at The Six Semiconductor of OPENEDGES Technology. "Although we are an IP company, we always architect our PHYs with the product in mind. "
“Our team, The Six Semiconductor(TSS) of OPENEDGES, have demonstrated a strong partnership with our client, showcasing exceptional project management and design execution,” said Sean Lee, CEO of OPENEDGES Technology. “We are thrilled to have a highly skilled design team handling such a challenging project within a demanding timeline.”
About OPENEDGES
OPENEDGES Technology, Inc. is a premier provider of memory subsystem IPs for the semiconductor industry. They offer a wide range of state-of-the-art solutions, including DDR memory controllers, DDR PHY, NoC interconnect, and NPU IPs that are widely adopted by customers worldwide. Their IPs comply with JEDEC standards, including LPDDR5x/5/4x/4/3, DDR5/4/3, GDDR6, and HBM3, ensuring their compatibility with the latest DDR technology trends. In 2019, they acquired The Six Semiconductor, Inc. (TSS), specializing in high-speed memory PHYs across multiple technologies. As a publicly listed company on the Korean Stock Exchange Market (394280. KQ), OPENEDGES is well-positioned to continue its growth and maintain its leadership in the memory subsystem IPs market.
Learn more about the company and its offerings by visiting the official website at www.openedges.com.
About The Six Semiconductor, Inc (TSS)
TSS is a Canadian technology company and a wholly-owned subsidiary of OPENEDGES, which specializes in developing advanced high-speed DDR PHY IP solutions that cater to a wide range of applications such as AI/ML, high-performance computing (HPC), mobile devices, and automotive. The company's product portfolio includes PHY IPs for various memory standards, including LPDDR5x/5/4x/4, GDDR6, and HBM3, that are optimized for power and area. TSS's solutions are designed to be compatible with multiple technologies, foundries, and process nodes. The company's team of experts has a wealth of experience in the field and is dedicated to providing the industry with high-quality and reliable DDR PHY IP solutions. To learn more about TSS's products, visit their website at www.thesixsemi.com.
|
Related News
- OPENEDGES Achieves Tapeout of LPDDR5x/5/4x/4 PHY IP on 5nm SF5A Process Technology
- OPENEDGES Proud to Announce the World's Only 7nm LPDDR5X PHY IP Operating at 8533 Mbps
- OPENEDGES' 12nm LPDDR5/4x/4 PHY is Ready for Mass Production by Novachips' SSD
- OPENEDGES Completes the Tapeout of the 7nm HBM3 Memory Subsystem (PHY & Memory Controller) Test chip
- OPENEDGES and The Six Semi Announce Silicon Proven LPDDR5/4/4x PHY in Samsung Foundry 14LPP Technology Operating at 6400Mbps
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |