Allegro DVT Announces the Industry's First MPEG-5 LCEVC Decoder Silicon IP
GRENOBLE, France-- April 04, 2023 -- Allegro DVT, a leading provider of silicon video IP solutions announces the availability of its D301, the first MPEG-5 Low Complexity Enhancement Video Coding (LCEVC) decoder IP solution. The D301 is expected to accelerate the adoption of the new video standard by allowing SoC/ASIC vendors to rapidly offer solutions compatible with the emerging format.
MPEG-5 part 2 LCEVC (Low Complexity Enhancement Video Coding) is the latest standard by MPEG and ISO. It specifies an enhancement layer which, when combined with a base video encoded with a separate codec such as H.264/HEVC/AV1/VVC, produces an enhanced video stream. The enhanced stream provides new features such as extending the compression capability of the base codec, lowering encoding and decoding power consumption, and providing a platform for additional future enhancements.
The D301 LCEVC decoder IP is optimized for power and silicon area, making it suitable for system-on-chip (SoC) designers to easily integrate LCEVC decoding into their products. It supports picture resolution up to 8K, pixel widths from 8 to 12-bits and chroma subsampling formats ranging from 4:2:0 up to 4:4:4. The IP also features fast and easy SoC integration and is delivered with full user configurable control software.
Guido Meardi, CEO of V-Nova said: “We are very excited about Allegro DVT’s introduction of their LCEVC decoder IP. As a market leader in video silicon IPs, Allegro DVT’s product launch represents a cornerstone towards delivering the first HW enabled LCEVC decoding solutions which are key to optimizing power consumption and to supporting higher resolutions.”
Nouar Hamze, CEO of Allegro DVT added “We are proud to be the first company to offer an LCEVC decoder IP solution. Our D301 will enable our customers to integrate the new standard into their products quickly and easily, providing them with a significant competitive advantage."
Allegro DVT will host a live demonstration of the D301 on its booth (W1974) during the 2023 NAB show in Las Vegas (April 16-19).
About Allegro DVT
Allegro DVT is a world leading provider of digital video technology solutions including compliance streams and video codec semiconductor IPs focused on H.264, HEVC, VP9, AV1, VVC and LCEVC standards.
www.allegrodvt.com
About V-Nova
V-Nova is committed to unlocking higher picture quality at scale. Its technologies, based on the innovative use of AI and parallel processing improve data, video, imaging, point-cloud compression and have been granted international standard status by MPEG, ISO and SMPTE. Our relentless investment in R&D has built a portfolio of over 600 international patents which we monetize through software licensing, IP royalties and product sales.
For more about V-Nova, please visit: www.v-nova.com
|
Allegro DVT Hot IP
Related News
- Allegro DVT Fosters Adoption of MPEG-5 LCEVC Video Codec, Releases a Full Range of LCEVC Products
- World's First AV1 Decoder Silicon IP with support for 12-bit pixel size and 4:4:4 Chroma Sub-Sampling Released by Allegro DVT
- Allegro DVT Launches the World's First Hardware-Based VVC/H.266 Decoder Silicon IP
- HEVC/H.265 4K decoder IP & compliance streams, by Allegro DVT, at ARM TechCon'13
- Live demonstration of Allegro DVT's HEVC/H.265 Main10 video decoder IP at IBC 2013
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |