ARC International Announces First Voice Coding Libraries for Customizable Core
EMBEDDED SYSTEMS CONFERENCE, SAN FRANCISCO, CA., April 22, 2003 – ARC International (LSE: ARK), a world leader in user-customizable processors, silicon peripheral IP, real-time operating systems and software tools for embedded system development, today introduced its voice coding library for the customizable ARCtangent-A5 RISC/DSP core. The library forms the first set of voice codecs available for a single-chip design that achieve performance levels comparable to a pure-play DSP - without the need for a second device to handle system functions. By implementing its voice codecs on its ARCtangent-A5 RISC/DSP core, ARC continues to deliver on its mission of simplifying the design process by reducing development time, costs and risk.
The codec library is optimized to run on the ARCtangent-A5, taking advantage of its customizable DSP extensions to reduce MIPS requirements. As a result, the library delivers some of the most MIPS-efficient voice coding software available on a scalar RISC or DSP, in a unified RISC/DSP solution.
"Our highly customizable ARCtangent processor cores enable developers to easily modify and extend their designs for specific applications," said Mike Gulett, president and CEO of ARC International. "With our ARC voice coding library, developers will be able to obtain the highest performance voice processing on a single processor system for their VoIP applications in a low-cost solution from a single vendor."
Reduces Complexity and Development Time
The unified solution eliminates the need for a multiprocessor system to handle applications such as Voice over Internet Protocol (VoIP), which have traditionally used a DSP for the voice processing and a RISC processor to handle the networking protocols. As a result of eliminating the need for a second processor, the solution speeds a product to market by simplifying design while reducing silicon cost. In addition, designers can work in a single software environment for both RISC and DSP development, both lowering cost and reducing time to market by significantly reducing development time.
The single processor uses less power than a multiprocessor design. ARC's optimized voice codecs further lower a product's power consumption by significantly reducing the CPU loading for voice compression, allowing designs to meet performance goals at lower clock speeds. In addition, because ARC's voice codecs use only a small portion of the total CPU capacity, developers have enough bandwidth to add differentiating features such as text-to-speech software and multi-caller conferencing to their designs without needing to increase the clock frequency.
Of special interest, is the fact that reduced power demand at the chip level means that expensive system components such as power supplies, batteries and thermal management hardware can be made smaller, perhaps even eliminated, thereby reducing system cost. This allows a design based on the ARCtangent-A5 and its voice codec library to specifically meet the needs of VoIP applications, such as SOHO gateways and VoIP handsets, which require a low-cost, low-power solution.
Voice Coding Library Features
ARC's voice coding library includes a full set of codec types, including A-law/µ-law, ADPCM, and CELP compression schemes. In addition, the library includes algorithms such as Line and Acoustic echo cancellation (LEC and AEC) for suppressing analog line and background noise effects. ARC's voice codecs also allow designers to improve reliability in their VoIP applications by including Packet Loss Concealment software, which protects applications against corrupt or lost data during the transmission of voice packets. Designers can also reduce the network bandwidth demands of their designs with the library's Voice Activity Generation (VAG) and Comfort Noise Generation (CNG) components by not encoding lulls in voice conversations but still generating sound at the receiving end to keep users from experiencing dead silence.
The ARC voice codecs are fully compliant with the ITU's (International Telecommunication Union) standards, ensuring VoIP designs will provide high quality voice reproduction. The library works with ARC's Precise/MQXTM operating system and Precise/RTCSTM TCP/IP stack, so developers can obtain all the elements of a voice over IP (VoIP) design from a single vendor, eliminating the need to integrate elements and ensuring a single source of development support. As a result, product development can proceed quickly with minimal risk allowing developers to concentrate on adding their unique design value rather than spending time solving integration issues.
Pricing and Availability
The ARC voice coding libraries are available now. The royalty-free project license fees for library components start at $20,000 with package discounts available. The ARC VoIP license does not include royalties for third-party patents that may be deemed essential.
About ARC
ARC International pioneered the integrated development environment for SoC design in an effort to minimize design risk for customers developing next generation wireless, networking and consumer electronics products. ARC introduced the industry's first user-customizable 32-bit RISC/DSP processor core. In early 2000, ARC became the first company to integrate the development tools, peripherals, RTOS and software that enable the designer to better design optimization and performance. ARC's approach to providing a single source for the major SoC building blocks reduces the number of IP suppliers, reduces cost, reduces the risk of system-on-chip design and reduces time-to-market.
ARC's products include:
ARC International employs approximately 200 people in research and development, sales and marketing offices across North America, Europe and Asia. Full details of the company's locations and other information are available on the company's website, www.ARC.com. ARC International is listed on the London Stock Exchange as ARC International plc (LSE:ARK).
Statements made in this press release that are not historical facts include forward-looking statements that involve risks and uncertainties. Important factors that could cause actual results to differ from those indicated by such forward-looking statements include, among others, market acceptance of the ARC technology; fluctuations in and unpredictability of the Company's quarterly results; general economic and business conditions; regulatory policies adopted by governmental authorities; assumptions regarding the Company's future business strategy; changes in technology; competition; ability to attract and retain qualified personnel; risks associated with the Company's international operations; and other uncertainties that are discussed in the "Investment Considerations" section of the Company's listing particulars dated 28 September 2000 filed with the United Kingdom Listing Authority and the Registrar of Companies in England and Wales. The Company disclaims any intention or obligation to update any forward-looking statements as a result of developments occurring after the date such statement was first made. In view of the many applications in which its Licensees may use the ARC products, ARC cannot warrant that those applications do not infringe the patents of others. ARC strongly encourages its Licensees to become familiar with the policies governing the use and licensing of intellectual property established by any organization whose standards the Licensee wishes to follow, and to review the list most standards-promulgating organizations publish, of entities that claim to have patents relating to the relevant standards or underlying technology.
ARC, the ARC logo, ARCtangent, ARCangel, ARCompact, ARChitect, ARCform, CASSEIA, High C, High C/C++, SeeCode, MetaDeveloper, MetaWare, Precise Solution, Precise/BlazeNet, Precise/EDS, Precise/MFS, Precise/MQX, Precise/MQXsim, Precise/RTCS, Precise/RTCSsim are trademarks of ARC International. All other brands or product names are the property of their respective holders.
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