Sarnoff Offers Implementations of FPGA Video Processing Cores for Military Applications

Low-Latency Fusion Capability Added to Tracking, Warping, Noise Reduction IP; Company Will Customize for Military Use

PRINCETON, NJ (April 22, 2003) -- Sarnoff Corporation, an industry leader in video image processing technology, today announced at the SPIE Aerosense conference in Orlando, FL the availability of a new low-latency fusion capability plus the offering of customization of its Verilog format silicon intellectual property (IP) cores for military applications. The available code, which also includes tracking, warping, and noise reduction, can be implemented in a field-programmable gate array (FPGA) along with other system elements to provide unprecedented video performance.

The new low-latency fusion capability achieves millisecond latency to display fused video streams with no perceptible delay through the use of at least four pyramidal (resolution) levels. This approach also provides the best fusion of multiple video streams available, with excellent registration even when combining visible-light and infrared images.

The other cores, originally announced earlier this year, can now be customized to support development efforts of the Future Combat Systems (FCS), Objective Force Warrior (OFW), and various vehicle night vision system programs. The warping and noise reduction cores allow optimization of the processed image. Video tracking provides a multi-hyposthesis core, which uses size, shape, color and motion to uniquely tag and track moving objects in the video field.

"It is our hope that these cores will give the defense community a significant and advanced starting point from which to push the state of the art in future military systems without reinventing the wheel," said Sr. Business Development Director Mark Sartor. "The outcome of millions of dollars of development efforts spanning more than a decade is now available in an implementation specifically targeted at defense needs."

Sarnoff is providing quotes for the cores on a per request basis. The offering will include NRE to implement and test the code on the FPGA of choice, and per copy pricing based on quantity.

The cores have been silicon proven in an ASIC implementation for the Acadia I™ PCI board, available through Sarnoff subsidiary Pyramid Vision Technologies.

About Sarnoff
Sarnoff Corporation (www.sarnoff.com) produces innovations in electronic, biomedical and information technology that generate successful new products and services for clients worldwide. Founded in 1942 as RCA Laboratories, it develops breakthroughs in ICs, lasers, and imagers; drug discovery, manufacture and delivery; digital TV and video for security, surveillance, and entertainment; high-performance networking; and wireless communications. Its history includes the development of color TV, the liquid-crystal display, and the disposable hearing aid, and a leadership role in creating the new U.S. digital and HDTV standard. Sarnoff also founds new companies to bring its technologies to market. It is a subsidiary of SRI International.