Cadence Expands Collaboration with Samsung Foundry, Providing Differentiated Reference Flows Based on the Integrity 3D-IC Platform
SAN JOSE, Calif.— June 28, 2023 -- Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced an expanded collaboration with Samsung Foundry to accelerate 3D-IC design development for next-generation applications like hyperscale computing, 5G, AI, IoT and mobile. This latest collaboration advances multi-die planning and implementation with the delivery of the latest reference flows and corresponding package design kits based on the Cadence® Integrity™ 3D-IC platform, the industry’s only unified platform that includes system planning, packaging and system-level analysis in a single cockpit. In addition, the Integrity 3D-IC platform supports Samsung’s new 3D CODE standard, a new system description language that simplifies the definition and interoperability of design creation and analysis flows in a unified environment.
When developing advanced package multi-die designs, engineers can encounter design analysis and flow complexities, configuration challenges, and system-level thermal and power integrity issues, all of which extend design turnaround time. To address these challenges, the comprehensive, unified solution—reference flows, package design kits and the Samsung 3D CODE standard—simplifies the multi-die design and implementation process, improving productivity and reducing design turnaround time. The reference flows based on the Integrity 3D-IC platform offer key capabilities, including early analysis for the power delivery network (PDN), thermal and system-level layout versus schematic (LVS) and design rule checking (DRC). The flows also incorporate the Cadence Allegro® X packaging technologies as well as multiphysics system-level analysis tools, Celsius™ Thermal Solver and Clarity™ 3D Solver, which provide further productivity benefits.
“Customers creating high-performance designs are looking to make use of the benefits advanced packaging technologies offer, such as lower power, lower yield cost and system performance boosts,” said Sangyun Kim, vice president of the Foundry Design Technology Team at Samsung Electronics. “With the introduction of our 3D CODE technology and Cadence’s comprehensive new flows, we’re providing mutual customers with the next-generation chiplet architectures required to achieve multi-die planning and implementation objectives so they can deliver high-quality products to market faster.”
“Through our continued collaboration with Samsung Foundry, we’re helping customers gain a competitive edge with our multi-die design platform,” said Vivek Mishra, corporate vice president in the Digital & Signoff Group at Cadence. “The reference flows based on the Cadence Integrity 3D-IC platform combined with Samsung’s latest technologies provide our customers a unified design environment that simplifies the workflow and reduces multi-die planning and implementation turnaround time when creating complex 3D-IC designs.”
The Cadence Integrity 3D-IC platform supports the company’s Intelligent System Design™ strategy, enabling SoC design excellence. For more information on the Integrity 3D-IC platform, please visit www.cadence.com/go/integrity3dadvpckg.
About Cadence
Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For nine years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.
|
Cadence Hot IP
Related News
- Cadence Delivers New Design Flows Based on the Integrity 3D-IC Platform in Support of TSMC 3Dblox™ Standard
- Cadence Expands Collaboration with Samsung Foundry to Advance 3D-IC Design
- TSMC and Cadence Collaborate to Deliver AI-Driven Advanced-Node Design Flows, Silicon-Proven IP and 3D-IC Solutions
- Cadence and Samsung Foundry Accelerate Chip Innovation for Advanced AI and 3D-IC Applications
- GUC Tapes Out Complex 3D Stacked Die Design on Advanced FinFET Node Using Cadence Integrity 3D-IC Platform
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |