Efabless Corporation Launches Its Second AI-Generated Chip Design Contest
PALO ALTO, Calif., July 7, 2023 -- Efabless Corporation, the creator platform for chips, announces the launch of its second in a series of AI Generated Open-Source Silicon Design Challenges. In the first design challenge, several participants successfully submitted completed designs in just three weeks. The second challenge will extend the design time to two months to enable wider participation, more learnings, and more success. The challenge series is targeted at a broad range of participants including IC designers, university students, professors, industry experts, and even those who have never designed a chip.
A lot has been written about the rapid emergence of generative AI in chip design. Large Language Model (LLM) AI is widely acknowledged as being an important productivity tool, with questions raised about its limitations. The Efabless AI Generated Open-Source Silicon Design Challenge series engages a global community in LLM AI chip creation to demonstrate the state of the art over time. The use of open source and an open forum enables and encourages broad based sharing of solutions and experiences across the community, accelerating its development and adoption.
As with the first challenge in the series, contestants will use AI tools to generate Verilog code from natural language prompts, which they will then implement on the Efabless chipIgnite platform using the OpenLane open-source design flow.
The deadline for submissions is September 7, 2023. A panel of industry experts will select the top three designs and announce the winners on September 14, 2023. Efabless will once again fabricate the winning designs and award the winners packaged silicon devices incorporating their designs along with evaluation boards, amounting to a total value of $9,750.
"We are excited to launch the second AI Generated Open-Source Silicon Design Challenge," said Mike Wishart, CEO of Efabless. "Our inaugural contest showcased the incredible potential of AI in shaping the future of chip design, and we cannot wait to witness the exceptional ideas that will emerge this time around."
To learn more about the second AI Generated Open-Source Silicon Design Challenge, please visit https://efabless.com/ai-generated-design-contest-2
About Efabless
Efabless offers a platform applying open source and community models to enable a global community of chip experts and non-experts to collaboratively design, share, prototype and commercialize special purpose chips. Nearly 1000 designs and 450 tapeouts have been executed on Efabless over the past two years. The company’s customers include startups, universities, and research institutions around the world.
|
Related News
- Efabless Reveals Winners of AI-Generated Silicon Design Challenge
- Efabless Launches an "AI Wake Up Call" Open-Source Silicon Design Challenge
- Efabless Launches chipIgnite with SkyWater to Bring Chip Creation to the Masses
- Efabless Launches the Chiplicity Design Partner Program Featuring Chipus Microelectronics, Sankalp Semiconductor and Symmid Corporation
- Algo-Logic Systems Launches High Performance Second Generation 100G Top-of-Rack (TOR) Switch for Datacenters
Breaking News
- Baya Systems Raises $36M+ to Propel AI and Chiplet Innovation
- Andes Technology D45-SE Processor Achieves ISO 26262 ASIL-D Certification for Functional Safety
- VeriSilicon and Innobase collaboratively launched second-generation Yunbao series 5G RedCap/4G LTE dual-mode modem IP
- ARM boost in $100bn Stargate data centre project
- MediaTek Adopts AI-Driven Cadence Virtuoso Studio and Spectre Simulation on NVIDIA Accelerated Computing Platform for 2nm Designs
Most Popular
- Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
- Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
- Cadence to Acquire Secure-IC, a Leader in Embedded Security IP
- Blue Cheetah Tapes Out Its High-Performance Chiplet Interconnect IP on Samsung Foundry SF4X
E-mail This Article | Printer-Friendly Page |