Startups Help RISC-V Reshape Computer Architecture
By Saumitra Jagdale, EETimes Europe (July 17, 2023)
RISC-V has emerged as a game-changing open-source ISA. EE Times Europe has asked Semidynamics, Axiomise and Agile Analog about the future of RISC-V in the computing landscape.
The RISC-V instruction set architecture (ISA) is one of the most notable contenders to emerge in the ever-evolving realm of computer architecture. Because of its modularity, RISC-V provides more flexibility and customization possibilities than the ARM and x86 ISAs, and it requires no license fees. The open-source ISA, which started in 2010 as part of the Parallel Computing Laboratory (Par Lab) at the University of California, Berkeley, is now being used in more than 10 billion CPU cores in the market and continues on an aggressive growth path. The main factors that have helped RISC-V attract the attention of researchers, developers and industry leaders are its simplicity, modularity and openness.
RISC-V is the fifth generation of the Reduced Instruction Set Computer ISA. At its core, RISC-V employs a load-store architecture, in which data is loaded from memory into registers, operated upon using arithmetic and logical instructions, and then stored back into memory. It features a fixed-length instruction format with a variety of base integer instructions, as well as optional instruction extensions for floating-point operations, vector processing, cryptography and other tasks. The ISA is organized into multiple privilege levels, allowing for the secure and efficient execution of software at different levels of the system.
The modularity of RISC-V makes the ISA highly customizable and adaptable to various computing requirements, enabling designers to choose and incorporate only the instructions required to implement their solution. Its open nature and flexible design have made it popular for research, development and innovation in the field of computer architecture.
RISC-V is set to follow the same path as Linux, whose development community has made contributions over the years that have expanded the open-source operating system’s functionality and market. Similarly, developers in the RISC-V ecosystem are working together to create ISA and non-ISA specifications that leverage the advantages offered by RISC-V. Many companies have started developing products based on RISC-V and are targeting use cases from analog intellectual property (IP) and formal verification to GPU vector cores.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
Related News
- Imagination announces the first RISC-V computer architecture course
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing
- Arm vs. RISC-V in 2025: Which Architecture Will Lead the Way?
- SensiML Expands Platform Support to Include the RISC-V Architecture
- lowRISC and Microsoft Collaborate to Help Bring the Revolutionary CHERIoT-Ibex Core to Production Grade
Breaking News
- intoPIX Powers Ikegami's New IPX-100 with JPEG XS for Seamless & Low-Latency IP Production
- Tower Semiconductor and Alcyon Photonics Announce Collaboration to Accelerate Integrated Photonics Innovation
- Qualcomm initiates global anti-trust complaint about Arm
- EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
- SiliconIntervention Announces Availability of Silicon Based Fractal-D Audio Amplifier Evaluation Board
Most Popular
- Qualcomm initiates global anti-trust complaint about Arm
- Siemens acquires Altair to create most complete AI-powered portfolio of industrial software
- Alphawave Semi Reveals Suite of Optoelectronics Silicon Products addressing Hyperscaler Datacenter and AI Interconnect Market
- EnSilica Agrees $18m 7 Year Design and Supply ASIC Contract
- Rapidus Announces Strategic Partnership with Quest Global to Enable Advanced 2nm Solutions for the AI Chip Era