JEDEC and Open Compute Project Foundation Pave the Way for a New Era of Chiplet Innovation
ARLINGTON, VA., USA – OCTOBER 10, 2023 ― In an extraordinary leap forward for the chiplet industry, the groundbreaking collaboration between the Open Compute Project Foundation (OCP) and JEDEC is set to usher in a new era of innovation. By merging the capabilities and open standards of OCP’s Chiplet Data Extensible Markup Language (CDXML) and JEDEC’s JEP30 PartModel Guidelines, this partnership, initiated in late 2022, promises to revolutionize chiplet design, manufacturing and integration. The result will be a unified structure that supports both chiplets and general electronic parts within the overarching purview of JEDEC.
In a significant development, the integration of OCP CDXML into JEP30 has reached a critical milestone, enabling chiplet builders to provide standardized chiplet part descriptions to their customers electronically. This advancement opens the door to automating System in Package (SiP) design and assembly using chiplets. The chiplet descriptions encompass crucial information for SiP builders, including thermal properties, physical and mechanical requirements, behavior specifications, power and signal integrity properties, testing in-package and security parameters.
“The integration of JEDEC JEP30 and OCP CDXML is truly a groundbreaking endeavor, creating a unified platform that revolutionizes chiplet and electronic part integration,” said Michael Durkan, JEDEC Task Group Chair and PartModel Sponsor. He continued: “Enabling component manufacturers to create standardized digital part models that can be easily used by designers and engineers in all varieties of electronic systems will help propel the industry forward with next-level digitalization and automation.”
The Chiplet Design Exchange (CDX), an open-source working group operating in the Open Domain-Specific Architecture (ODSA) sub-project within the Open Compute Project, comprises a team of experts from diverse fields, including EDA, system design, IC and SiP design, OSAT, IC fabrication and material supply. Their collective mission, and that of the OCP ODSA Project, revolves around nurturing a flourishing open chiplet economy. The CDX group presented a whitepaper at the IEEE 3DIC 2021 conference in October 2021, introducing standardized chiplet models designed for development and validation of 3D IC designs. While many of these models drew from established standards, a standout innovation emerged in the form of machine-readable models for electrical and mechanical properties, which have since evolved into the JEDEC JEP30 PartModels. These models form the foundation of a Chiplet Design Kit (CDK).
“By uniting the power of OCP CDXML and JEDEC JEP30 standards, we are forging a new era of collaboration and innovation in the chiplet industry. This integration empowers engineers, manufacturers and designers with a comprehensive framework that enhances efficiency, compatibility and customization,” said Cliff Grossner, Ph.D., Chief Innovation Officer with OCP. He added: “The OCP CDXML-JEDEC JEP30 collaboration embodies OCP’s value proposition and its commitment to driving progress and elevating the industry as a whole.”
Looking ahead, there are exciting prospects for additional integration efforts between the Open Compute Project Foundation and JEDEC. Both organizations remain committed to ongoing innovation as they continue to explore new avenues to enhance the chiplet industry.
Check out all the sessions related to the chiplet economy at the upcoming 2023 OCP Global Summit, taking place at the San Jose Convention Center October 17 to 19. Click here to view the full schedule, register and more: https://www.opencompute.org/summit/global-summit
About the Open Compute Project Foundation
The Open Compute Project (OCP) is a collaborative Community of hyperscale data center operators, telecom, colocation providers and enterprise IT users, working with the product and solution vendor ecosystem to develop open innovations deployable from the cloud to the edge. The OCP Foundation is responsible for fostering and serving the OCP Community to meet the market and shape the future, taking hyperscale-led innovations to everyone. Meeting the market is accomplished through addressing challenging market obstacles with open specifications, designs and emerging market programs that showcase OCP-recognized IT equipment and data center facility best practices. Shaping the future includes investing in strategic initiatives and programs that prepare the IT ecosystem for major technology changes, such as AI & ML, optics, advanced cooling techniques, composable memory and silicon. OCP Community-developed open innovations strive to benefit all, optimized through the lens of impact, efficiency, scale and sustainability. Learn more at: www.opencompute.org.
About JEDEC
JEDEC is the global leader in the development of standards for the microelectronics industry. Thousands of volunteers representing over 350 member companies work together in more than 100 JEDEC committees and task groups to meet the needs of every segment of the industry, manufacturers and consumers alike. The publications and standards generated by JEDEC committees are accepted throughout the world. All JEDEC standards are available for download from the JEDEC website. For more information, visit www.jedec.org.
|
Related News
- Open Compute Project Foundation and JEDEC Announce a New Collaboration
- AccelerComm® Joins Open Compute Project Foundation Focusing on Evenstar Modular Open RAN Radio Unit Reference Design
- Linux Foundation to Host CHIPS Alliance Project to Propel Industry Innovation Through Open Source Chip and SoC Design
- Industry Leaders Launch RISE to Accelerate the Development of Open Source Software for RISC-V
- proteanTecs to Present in Open Compute Project (OCP) Webinar on Silent Data Errors for Resilient Data Centers
Breaking News
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Cadence Unveils Arm-Based System Chiplet
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards
E-mail This Article | Printer-Friendly Page |