NVM OTP NeoBit in Maxchip (180nm, 160nm, 150nm, 110nm, 90nm, 80nm)
T2M-IP Presents Silicon Proven 22nm 1.5GHz Fractional-N PLL IP Core, with Dynamic Configuration for Wireless and Automotive SoCs - Licensing Now Available.
November 13, 2023 - T2MIP, the global independent semiconductor IP cores provider and technology expert, is pleased to announce its partner's silicon-proven 1.5GHz Fractional-N Phase-Locked Loop (Frac-N PLL) IP core. This IP core represents a significant advancement in the field of clock generation and synchronization, offering an on-the-fly programmable PLL solution designed to lock onto an incoming clock source and deliver a highly precise 1.5GHz clock output. This core is designed for applications demanding ultra-high frequency clock generation and is optimized for the 22nm process technology node.
Key Features:
- High-Frequency Output: The 1.5GHz Frac-N PLL IP Core provides clock outputs of up to 1.5GHz, making it a crucial component for applications requiring rapid and precise clock signals.
- Versatile Multiplicand Range: With a wide range of programmable multiplicand settings, this IP core offers exceptional flexibility to accommodate various frequency multiplication requirements while maintaining signal integrity.
- Compact Footprint: Designed with a focus on space efficiency, this IP core boasts a small physical area, making it an ideal choice for integration into compact semiconductor designs.
- Integrated TEST Pin: The inclusion of a TEST pin simplifies the verification and testing process, enhancing the IP core's usability for design and validation teams.
Deliverables:
Customers will receive a comprehensive set of deliverables with the 1.5GHz Frac-N PLL IP Core, including GDSII files, LVS Spice netlists, Verilog models, and the LEF (Library Exchange Format) for the clock generator and PLL. Additionally, detailed User Guidelines covering integration, layout, testability, packaging, and board-level considerations are provided, ensuring smooth integration and maximum value for our customers.
1.5GHz Frac-N PLL IP Core represents a significant leap forward in high-frequency clock generation, offering unmatched flexibility and precision for applications that demand optimal synchronization. This IP core empowers semiconductor designers to achieve exceptional performance while adhering to the 22nm process node.
Availability: These IP Cores are available for immediate licensing. For more information on licensing options and pricing please drop a request / MailTo . Together, let's redefine the possibilities of connectivity, efficiency, and performance.
About T2M: T2MIP is the global semiconductor IP & SW technology provider focused on complex system-level IP Core (RF, Analog, Digital, SW) for the Broadcast, ADC/DAC, Analog-Mixed signal, Wireless & and IOT Markets. Many licensing models are available for our Semiconductor IP Cores & SW, including source code technology transfer with unlimited usage.
For more information visit: www.t-2-m.com
|
T2M Hot IP
- GNSS Ultra low power (GPS, Galileo, GLONASS, Beidou3, QZSS, IRNSS, SBAS) Digital ...
- USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+
- DVB-S2X WideBand Demodulator & Decoder IP (Silicon Proven)
- MIPI D-PHY Tx IP, Silicon Proven in TSMC 22ULP
- Wi-Fi 802.11 ax/Wi-Fi 6 /Bluetooth LE v5.4/15.4-2.4GHz RF Transceiver IP for IOT ...
Related News
- MIPI C-D Combo PHY and DSI Controller IP Cores, Silicon Proven, Immediate licensing at a Competitive Price for Your Next Project
- T2M-IP Unveils the 12-bit 4Gsps ADC Silicon-Proven IP Core with Cutting-Edge Features, Silicon Proven and Ready to License
- T2M-IP Unveils Best-Selling DVB-T2/T Demodulator IP Core with Cutting-Edge Features, Silicon Proven and Ready to License
- Empower Your Wi-Fi 6 and Wi-Fi 6E SoCs with 12-Bit 640Msps Dual Channel ADC and DAC IP Cores, Now Available for Immediate Licensing in Silicon Proven 22nm ULL and ULP Technology
- Silicon Creations Celebrates Milestone with Delivery of 1,000th Production License for Fractional-N PLL
Breaking News
- RaiderChip unveils its fully Hardware-Based Generative AI Accelerator: The GenAI NPU
- Baya Systems Raises $36M+ to Propel AI and Chiplet Innovation
- Andes Technology D45-SE Processor Achieves ISO 26262 ASIL-D Certification for Functional Safety
- VeriSilicon and Innobase collaboratively launched second-generation Yunbao series 5G RedCap/4G LTE dual-mode modem IP
- ARM boost in $100bn Stargate data centre project
Most Popular
- Andes Technology D45-SE Processor Achieves ISO 26262 ASIL-D Certification for Functional Safety
- Cadence to Acquire Secure-IC, a Leader in Embedded Security IP
- Arm Chiplet System Architecture Makes New Strides in Accelerating the Evolution of Silicon
- ARM boost in $100bn Stargate data centre project
- Alphawave Semi to Lead Chiplet Innovation, Showcase Advanced Technologies at Chiplet Summit
E-mail This Article | Printer-Friendly Page |