Virage Logic licenses technology-optimized platforms to Agilent Technologies
Virage Logic¡¦s Complete Portfolio of Highly Optimized IP Addresses Volume, Density and Performance Requirements
FREMONT, Calif., May 13, 2003 ¡X Virage Logic (Nasdaq:VIRL), a leading provider of best-in-class semiconductor IP platforms, today announced that Agilent Technologies, Inc. has supplemented its internally developed memory, logic, and I/O offerings by licensing Virage Logic¡¦s Technology-Optimized Platforms. The license agreement spans 0.18ƒÝm, 0.13ƒÝm and 90-nm processes for the major third-party foundries. Virage Logic¡¦s Technology-Optimized Platform met Agilent¡¦s stringent requirements for their high-volume, high-density and high-performance ASIC and SoC applications.
¡§With increased process and design complexity and shorter design cycles, we need pre-tested and ready-to-use IP that is interoperable and designed for manufacturability,¡¨ said James Stewart, vice president and general manager of Agilent¡¦s ASIC Products Division. ¡§With Virage Logic¡¦s proven technology offered in a complete IP platform, we have a partner that provides us with the flexibility for a wide range of applications.¡¨
¡§Our customers know that they can depend on us to deliver fully tested and validated IP. We work very closely with the foundries to achieve high manufacturing yields, which enables our customers to dramatically cut silicon and system costs,¡¨ said Adam Kablanian, CEO and president, Virage Logic. ¡§With our Technology-Optimized Platforms, we are able to address Agilent¡¦s specific characteristics and requirements for their market segments. Regardless of the application, the platform provides a customized portfolio grounded in advanced technology that¡¦s designed to meet current and future design challenges.¡¨
Technology-Optimized Semiconductor IP Platforms
Building on its technology and market leadership position, Virage Logic¡¦s Technology-Optimized Platforms aim to meet the critical requirements of reducing silicon costs and failure risks, while boosting performance and ensuring high manufacturing yields for a particular foundry or IDM process. By providing silicon-proven, integrated IP that is compatible with all the major EDA flows, Virage Logic¡¦s Technology-Optimized Platforms address the needs of complex and mainstream SoC designs.
Virage Logic¡¦s Technology-Optimized Platforms are based on its highly differentiated IP including the Self-Test and Repair (STAR) Memory System„§, the Area, Speed and Power (ASAP) Memory„§ product line, the ASAP Logic„§ product line with its metal programmable and standard cell libraries, and the recently introduced Base I/O libraries. Technology-Optimized Platforms enable customers to expedite the creation of next generation products by addressing the increasingly complex task of identifying and obtaining the semiconductor IP needed to produce successful, on-time products. Virage Logic¡¦s semiconductor IP platform strategy calls for the delivery of Technology-Optimized Platforms for a broad range of third-party foundry and Integrated Device Manufacturer (IDM) processes.
About Virage Logic
Virage Logic Corp. (Nasdaq:VIRL) is a leading provider of best-in-class semiconductor IP platforms based on memory, logic, I/Os, and IP development tools that are silicon proven and production ready. Virage Logic meets market demands for cost reduction, while improving performance and reliability for fabless and integrated device manufacturer (IDM) companies focused on the consumer, communications and networking, handheld and portable, and graphics markets. Virage Logic is headquartered in Fremont, California and has sales and support offices worldwide. For more information, visit www.viragelogic.com or call (877) 360-6690 toll free or (510) 360-8000.
###
SAFE HARBOR STATEMENT FOR VIRAGE LOGIC UNDER THE PRIVATE SECURITIES LITIGATION REFORM ACT OF 1995:
Statements made in this news release other than statements of historical fact are forward-looking statements, including, for example, statements relating to Virage Logic's business outlook, new products and new relationships. Forward-looking statements are subject to a number of known and unknown risks and uncertainties, which might cause actual results to differ materially from those expressed or implied by such statements. These risks and uncertainties include Virage Logic's ability to maintain and develop new relationships with third-party foundries, adoption of technologies by semiconductor companies and increases in the demand for their products, the company's ability to overcome the challenges associated with establishing licensing relationships with semiconductor companies, the company's ability to obtain royalty revenues from customers in addition to license fees, business and economic conditions generally and in the semiconductor industry in particular, competition in the market for embedded memories and other risks including those described in the Company's Annual Report on Form 10-K for the period ended September 30, 2002, filed with the Securities and Exchange Commission (SEC) on December 16, 2002, and in Virage Logic's other periodic reports filed with the SEC, all of which are available from Virage Logic or from the SEC's website (www.sec.gov), and in press releases and other communications. Virage Logic disclaims any intention or duty to update any forward-looking statements made in this news release.
All trademarks and copyrights are property of their respective owners and are protected therein.
Contact Virage Logic
Related News
- Virage Logic Announces Availability of First Technology-Optimized IP Platform
- Open-Silicon Licenses MIPS32(R) 24KEc(TM) Pro Core and Virage Logic Core-Optimized IP Kit for Future ASIC Development
- Russian SoC Leader MRI Progress Licenses Virage Logic's ARC(R) Video 401V Subsystem for Digital TV Applications
- Richtek Licenses Virage Logic's AEON(R) MTP Family of NVM IP for Its Advanced Analog and Power Management Products
- Virage Logic Expands Suite of Certified, Fully Optimized Audio Codecs, Underscoring Its Investment in ARC(R) Processors
Breaking News
- Micon Global and Silvaco Announce New Partnership
- Arm loses out in Qualcomm court case, wants a re-trial
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
Most Popular
E-mail This Article | Printer-Friendly Page |