English
Synopsys Acquires RISC-V Processor Simulation Tools Firm
By Nitin Dahad, EETimes (December 21, 2023)
Synopsys appears to be on a mission to build out its total RISC-V ecosystem offerings, having quietly acquired Imperas Software last week. Imperas, which EDA industry veteran Simon Davidmann founded in 2005, has become a key player in providing tools to develop software multi-processor core devices, with an accurate library of models for processors ranging from RISC-V to Arm, Imagination, MIPS, PowerPC, Arc and others.
While Imperas addresses simulation, debug and test for all the key architectures, its expertise in developing new methodologies to address the emerging expertise in RISC-V was a key proposition for Synopsys, especially with its recent entry into the RISC-V world with the ARC-V processor. Imperas also recently announced it had added the Tenstorrent Ascalon processor core to the Imperas RISC-V model library, and other collaborations for RISC-V applications with MIPS, Ventana Micro, Dolphin Design and more.
|
E-mail This Article | 
|
|
Printer-Friendly Page |
Related News
- Synopsys Adds AI-Driven Tools, Acquires PUF Security Firm
- Synopsys Expands Its ARC Processor IP Portfolio with New RISC-V Family
- Imperas RISC-V Solutions for Developers - Accelerating RISC-V
- Imperas Collaborates with Synopsys on SystemVerilog based RISC-V Verification
- Ventana Micro Selects Imperas Solutions for RISC-V Processor Verification
Breaking News
- Jury is out in the Arm vs Qualcomm trial
- Ceva Seeks To Exploit Synergies in Portfolio with Nano NPU
- Synopsys Responds to U.K. Competition and Markets Authority's Phase 1 Announcement Regarding Ansys Acquisition
- Alphawave Semi Scales UCIe™ to 64 Gbps Enabling >20 Tbps/mm Bandwidth Density for Die-to-Die Chiplet Connectivity
- RaiderChip Hardware NPU adds Falcon-3 LLM to its supported AI models