PCIe 7.0 specification reaches "half way point"
By Nick Flaherty, eeNews Europe (April 3, 2024)
The latest version of PCI Express, PCIe 7.0, is on track for launch in 2025 with version 0.5 available today.
PCIe 7.0 updates the standard for PAM4 signalling to achieve 128 GT/s raw bit rate and up to 512 GB/s bi-directionally via x16 configuration while still being backwards compatible. Most leading systems are only now shipping PCIe 5.0 in chips, and PCIe 6.0 was released as a standard at the end of 2021.
The PCIe 7.0 technology is aimed to be a scalable interconnect solution for data-intensive markets including 800G Ethernet, artificial intelligence, machine learning, cloud hyperscaler data centres, high performance computing (HPC) and quantum computing.
E-mail This Article | Printer-Friendly Page |
Related News
- Alphawave Semi and InnoLight Extend PCIe over Optics Collaboration with Demonstration of 128Gbps Gen 7.0 over Low Latency Linear Pluggable Optics at ECOC 2024
- Rambus Unveils PCIe 7.0 IP Portfolio for High-Performance Data Center and AI SoCs
- Alphawave Semi to Showcase Next-Generation PCIe® 7.0 IP Platform for High-Performance Connectivity and Compute at PCI-SIG® DevCon 2024
- Synopsys Accelerates Trillion Parameter HPC & AI Supercomputing Chip Designs with Industry's First PCIe 7.0 IP Solution
- Alphawave Semi and Teledyne LeCroy Unveil PCIe 7.0 Signal Generation and Measurement
Breaking News
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- TSMC drives A16, 3D process technology
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
Most Popular
- Cadence Unveils Arm-Based System Chiplet
- CXL Fabless Startup Panmnesia Secures Over $60M in Series A Funding, Aiming to Lead the CXL Switch Silicon Chip and CXL IP
- Esperanto Technologies and NEC Cooperate on Initiative to Advance Next Generation RISC-V Chips and Software Solutions for HPC
- Eliyan Ports Industry's Highest Performing PHY to Samsung Foundry SF4X Process Node, Achieving up to 40 Gbps Bandwidth at Unprecedented Power Levels with UCIe-Compliant Chiplet Interconnect Technology
- Arteris Selected by GigaDevice for Development in Next-Generation Automotive SoC With Enhanced FuSa Standards